Staff PDK Engineer – LVS / PERC Development
Intel CorporationJob Title
Staff PDK Engineer – LVS / PERC Development
Role Summary
Senior technical contributor on the Design Technology Platform team focused on Process Design Kit (PDK) electrical verification. Deliver and maintain LVS and PERC verification solutions for Intel process technologies and work with process engineers, validation teams, and EDA vendors to enable production-quality PDKs.
Work spans multiple EDA platforms and includes methodology development, QA/regression, root cause analysis, and mentoring junior engineers.
Experience Level
Senior (Staff level). Experience guidance from minimum qualifications: typical hires meet degree+experience combinations such as BS+7 years, MS+5 years, or PhD+3 years; equivalent industry experience may be considered.
Responsibilities
Deliver and maintain electrical verification capabilities across LVS/PERC platforms and ensure PDK collateral quality.
- Develop and maintain LVS and electrical-rule verification runsets and decks for Cadence Pegasus, Siemens Calibre, and Synopsys ICV.
- Design and implement PERC (programmable electrical rule checking) rule decks and ESD protection verification solutions.
- Create QA and regression tests to qualify PDK collaterals and verification flows.
- Perform root-cause analysis for verification failures and optimize tools and methodologies.
- Collaborate with process development, validation teams, and EDA vendors to deploy production-quality solutions.
- Drive adoption of industry-standard methods and improve usability for internal and external design teams.
- Mentor junior engineers and contribute to team competency development.
Requirements
Must-have technical skills and domain experience; preferred items listed after must-haves.
- Must-have: 3+ years experience in one or more of: DRC/LVS runset development (Calibre-SVRF, ICV-PXL, Pegasus), PERC rule deck development, or ESD verification in PERC/static ESD flows.
- Must-have: Scripting proficiency in Python, Perl, or Tcl.
- Must-have: Experience with one or more LVS/PERC platforms: Cadence Pegasus, Siemens Calibre, Synopsys ICV.
- Preferred: Experience developing PDKs for advanced process technologies.
- Preferred: Familiarity with IC physical design, layout verification flows, and IC manufacturing process flows.
- Preferred: Exposure to DA/CAD/CAE environments: circuit simulation, parasitic extraction, current density analysis, P2P resistance, or netlisting tools.
- Strong problem-solving skills and ability to improve tools and methodologies.
Education Requirements
Required: BS with 7+ years, MS with 5+ years, or PhD with 3+ years in Electronics Engineering, Electrical Engineering, Computer Engineering, or a related technical field (or equivalent practical experience).
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
