Staff Memory Design Engineer

Job Title

Staff Memory Design Engineer

Role Summary

Design and optimize DRAM memory arrays, peripheral logic, and analog circuits for next-generation products. The role works with layout, verification, CAD/EDA and software teams to deliver silicon-ready memory IP and improve design methodology.

Use AI-driven tools and automation to accelerate schematic optimization, parasitic analysis, verification, and debug across simulation and silicon learning loops.

Experience Level

Senior — the posting indicates roughly 4–8 years of relevant memory-design experience.

Responsibilities

Core responsibilities include design, verification, and integration tasks focused on memory IP and methodology.

• Contribute to design, layout, and optimization of DRAM memory arrays, peripheral logic, and analog circuits.
• Leverage AI/ML tools and automation to accelerate schematic optimization, design-space exploration, parasitic analysis, and corner coverage.
• Define and evolve semicustom methodology for memory design and SoC integration.
• Collaborate with CAD, EDA, and software teams to integrate AI-driven flows into simulation, verification, and sign-off environments.
• Oversee and manage layout activities including floor-planning, placement, and routing.
• Perform circuit-level verification: functional, timing, power and reliability analysis using industry-standard and company tools.
• Drive cross-group standardization, communication, and design-process improvements.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• 4–8 years of experience in memory design (as indicated in posting).
• Strong fundamentals in CMOS circuit design, device physics, and memory operation.
• Experience with SPICE-based simulation and parasitic extraction.
• Experience with circuit-level verification covering functional, timing, power, and reliability analysis.
• Experience managing or coordinating layout (floor-planning, placement, routing).

Nice-to-have

• Domain knowledge in DRAM (DDR5, LPDDR5, HBM) or other memory technologies.
• Domain knowledge in NAND memory design.
• Exposure to or interest in AI/ML-assisted design flows, agentic AI, and advanced automation.
• Experience with SoC/ASIC semicustom flows.
• Strong communication and collaboration skills.

Education Requirements

Master's degree in Electrical Engineering or Computer Engineering was specified in the posting (Master’s degree required, with 4–8 years of experience in memory design). No certifications or alternative-equivalent-education language was provided.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.