Job Title
Staff Layout Engineer - DPG LPDDR
Role Summary
Design and own custom analog, mixed-signal, and high-speed layout for LPDDR PHY blocks to achieve first-silicon success and high-volume manufacturability. Work with circuit, verification, architecture, and silicon debug teams to meet timing, noise, IR/EM, and manufacturability targets.
Experience Level
Senior-level (Staff). Typical expectation for this level is 7+ years of relevant layout experience in advanced process nodes, though the posting does not state a specific years-of-experience requirement.
Responsibilities
Primary responsibilities focus on layout ownership, co-design with circuits, and ensuring signal integrity and manufacturability for LPDDR PHYs.
- Own custom analog and mixed-signal layout for LPDDR PHY datapath, bias networks, IO front-ends, and reference circuits with focus on matching, low-noise coupling, and PVT robustness.
- Complete high-speed LPDDR interface layout addressing skew control, impedance matching, shielding, crosstalk mitigation, and jitter sensitivity.
- Build and optimize array-based layouts for DQ/DQS byte lanes, CA lanes, and replica paths ensuring symmetry, pitch matching, repeatability, and scalability.
- Implement custom digital block layouts (training logic, calibration engines, test/debug) with attention to clocking and congestion near sensitive analog regions.
- Drive layout-aware co-design with circuit designers to meet timing, noise, IR, and EM requirements and incorporate parasitic awareness early.
- Apply power-distribution, grounding, isolation, guard rings, deep-N-well, decoupling, and domain separation strategies to protect critical signals.
- Perform DRC/LVS closure, parasitic extraction reviews, and correlate layout with simulation and silicon results.
- Support post-layout optimization and ECOs to address margin, yield, and manufacturability while maintaining JEDEC compliance.
- Contribute to PPA optimization with emphasis on low power, area efficiency, and reliability for LPDDR applications.
- Document and share layout guidelines and flows; participate in build reviews to enable first-silicon success.
Requirements
Core technical skills and experience required for successful performance in this role.
- Proven experience in custom analog and mixed-signal layout for high-speed memory PHYs or similar products.
- Experience with high-speed interface layout (LPDDR or equivalent), including signal-integrity techniques (skew control, impedance matching, shielding, crosstalk mitigation).
- Strong skills in array-based layout for byte lanes and multi-channel scaling, ensuring symmetry and repeatability.
- Ability to perform DRC/LVS closure, parasitic extraction reviews, and correlate layout with circuit/simulation results.
- Knowledge of power distribution, grounding, isolation techniques, and domain separation for mixed-signal designs.
- Experience working in cross-functional teams with circuit designers, verification, and silicon debug to resolve post-layout issues and ECOs.
Nice-to-have:
- Experience with advanced-node layout flows and tools for parasitic-aware design and extraction.
- Background in layout automation, data-driven optimization, or applying AI/ML techniques to layout and debug workflows.
- Familiarity with JEDEC LPDDR standards and high-volume manufacturability considerations.
Education Requirements
B.Tech/B.E in Electronics, Electronics & Communications, or VLSI Engineering; M.Tech in Electronics Engineering, Microelectronics, or VLSI Engineering. (Degrees listed in the source; equivalent practical experience is not stated.)
For application assistance or reasonable accommodations contact hrsupport_india@micron.com.
About the Company
Company: Micron Technology
Headquarters: Boise, Idaho, USA
Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.

Date Posted: 2026-06-16