Job Title
Staff Layout Designer
Role Summary
Design and deliver high-quality IC layouts for memory products, focusing on analog and periphery blocks. Work with design, CAD, test, and verification teams to meet tape-out schedules and quality targets.
Experience Level
Senior β 7+ years of layout experience (staff-level role).
Responsibilities
Primary duties include implementing, verifying, and delivering layout blocks and coordinating layout activities across teams.
- Implement and deliver high-quality layouts meeting design rules, DRC/LVS, and process requirements.
- Use Cadence VXL for periphery and other layout tasks.
- Debug DRC, LVS, and layout-related issues; provide effective solutions.
- Create layouts for critical blocks (temperature sensor, PLL, ADC, DAC, LDO, bandgap, reference generators, charge pump, current mirrors, comparators, differential amplifiers, etc.).
- Apply analog-layout fundamentals: matching, electromigration, latch-up, coupling, crosstalk, IR-drop, parasitics, and their impact on speed, capacitance, power, and area.
- Oversee floor-planning, placement, routing, and signoff for mid-size blocks in core/pitch and periphery areas.
- Execute ECO/LCO and DFM tasks and support multiple tape-outs.
- Coordinate with TD, design, CAD, verification, and layout teams to meet schedules and quality targets.
- Mentor junior layout engineers and organize resources to meet deadlines.
- Leverage automation and AI tools to improve layout productivity and quality.
Requirements
Key skills and experience required and desirable.
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Must-have: 7+ years of hands-on layout experience with demonstrable delivery of analog/periphery blocks.
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Must-have: Proficiency with Cadence VXL and strong DRC/LVS debugging skills.
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Must-have: Practical experience laying out critical analog blocks listed above and delivering tape-out quality layouts.
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Must-have: Solid understanding of analog layout principles and how layout affects circuit performance.
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Must-have: Experience managing layout flow: floor-plan, placement, routing, ECO/LCO, and DFM.
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Must-have: Ability to coordinate across design, CAD, test, and process groups and to meet scheduled tape-outs.
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Nice-to-have: Multiple tape-out support experience and familiarity with mask generation and tape-out procedures.
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Nice-to-have: Experience applying automation or AI tools to layout tasks.
Education Requirements
Not specified.
For assistance with the application process or reasonable accommodations, refer to the employer's contact information on the original posting.
About the Company
Company: Micron Technology
Headquarters: Boise, Idaho, USA
Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.

Date Posted: 2026-07-17