Staff GenAI Engineer - Early PDN Modeling

Job Title

Staff GenAI Engineer - Early PDN Modeling

Role Summary

Develop and deploy AI/ML solutions to automate early-stage power delivery network (PDN) analysis, power-integrity validation, and PDN optimization for memory products. The role partners with design, layout, CAD, package, and product teams to reduce manual work, improve design quality, and accelerate time-to-tapeout.

Experience Level

Senior-level role. Typical guidance: 5–7 years of relevant experience in power integrity, PDN design, circuit/physical/package design, or EDA workflows.

Responsibilities

Primary responsibilities include embedding AI and automation into PDN and power-integrity workflows and delivering predictive and optimization tools.

• Embed AI and automation into PDN analysis, power integrity validation, and optimization workflows.
• Develop data-driven models to predict IR drop, voltage droop, current density, decoupling effectiveness, and electromigration risk during early design stages.
• Enable AI-assisted optimization of power grid architectures, bump planning, package-PDN co-design, and decap placement.
• Leverage historical design, simulation, and silicon data to produce predictive power-integrity insights and actionable design recommendations.
• Develop ML and generative AI solutions for automated root-cause analysis and accelerated PDN design-space exploration.
• Collaborate with power integrity, design, CAD, package, and product engineering teams to scale AI-enabled methodologies and workflows.

Requirements

Must-have technical skills and domain experience; preferred items listed separately.

• 5–7 years of experience in power integrity, PDN design, circuit design, physical design, package design, or EDA workflows.
• Strong software development skills; ability to produce and maintain production-quality code in Python or similar languages.
• Proven experience applying data analysis, machine learning, or automation to engineering workflows.
• Practical understanding of power delivery networks, IR drop analysis, voltage integrity, or related semiconductor design domains.
• Ability to work cross-functionally with design, CAD, package, test, and product teams to deploy tools and methodologies.
• Nice-to-have: experience applying AI/ML specifically to power integrity, package design, simulation, or silicon-data analysis; familiarity with EDA tools and flows for power-integrity analysis; knowledge of memory-subsystem power delivery and package-PDN interactions; experience with graph neural networks, surrogate modeling, large language models, or agentic AI systems.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience is required. Preferred: Master's degree or PhD in Electrical Engineering, Computer Science, or a related field. Equivalent practical experience may be accepted in lieu of a degree.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.