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Staff Engineer - Power Management IC Design

Qualcomm
September 01, 2026
Full-time
On-site
Santa Clara, California, United States
$153,200 - $229,800 USD yearly
ASIC Design Jobs, Level - Senior

Job Title

Staff Engineer - Power Management IC Design

Role Summary

Lead definition, design, verification, and documentation of mixed-signal power management integrated circuits, emphasizing controller ICs and integrated high-current power stages for compute, data center, automotive, and industrial applications. Part of the PMIC Design team within the Engineering Group.

Accountable for IC architecture, circuit-level implementation and simulation, layout oversight, silicon bring-up, characterization, and production readiness.

Experience Level

Senior (Staff). Typical experience expected is 6+ years of analog, mixed-signal or power-management IC design; lower years of experience are acceptable with an advanced degree (see Education Requirements).

Responsibilities

Primary responsibilities include design leadership for complex PMIC subsystems and close collaboration with cross-functional teams.

  • Define and implement IC architecture and circuit designs; run simulations across PVT and operating conditions.
  • Own design and verification strategy for assigned blocks or subsystems, including controller circuitry and integrated power-stage interfaces.
  • Guide layout engineers and perform physical and reliability verification of circuits.
  • Interpret simulation and silicon characterization data; drive corrective design actions and document design intent and silicon findings.
  • Support silicon bring-up, qualification, and production ramp with validation, test, and product teams.
  • Provide technical guidance and informal mentoring to other engineers; participate in design reviews and technical problem solving.
  • Monitor industry trends and competitor products to inform ongoing and future designs.

Requirements

Must-have technical skills and experience required to perform the role.

  • Extensive experience in analog, mixed-signal, or power-management IC design (senior-level scope and ownership).
  • Hands-on experience with circuit simulation and CAD tools such as Cadence ADE/Spectre, SPICE, MATLAB; familiarity with Verilog/SystemVerilog or Verilog-AMS/VHDL.
  • Proven ability to lead layout execution and perform physical/reliability verification.
  • Experience with silicon bring-up, characterization, debug, and driving corrective actions.
  • Strong analytical and problem-solving skills; clear verbal and written technical communication across functions.
  • Ability to make independent technical decisions with moderate to high impact on product performance and schedule.
  • Nice-to-have: experience in behavioral modeling, mixed-signal verification techniques, multistage/high-current power stages, or high-accuracy analog front ends.

Education Requirements

Degree options tied to minimum experience: Bachelor's degree in Electrical Engineering (or related field) with 6+ years of relevant analog/mixed-signal or PMIC IC design experience; OR Master’s degree in Electrical Engineering or related field with 4+ years; OR PhD in Electrical Engineering or related field with 2+ years. The posting also expects academic and/or work experience using Cadence, SPICE, MATLAB and/or Verilog/VHDL. "Related field" indicates equivalent technical degrees; advanced degrees reduce required years of experience as listed above.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-09-01