Staff Engineer, Physical Design

Job Title

Staff Engineer, Physical Design

Role Summary

Design and close semicustom digital blocks for DRAM products, working across RTL-to-GDS flows. The role partners with block owners, integration teams, and silicon validation to deliver placed-and-routed IP that meets timing, power, and functional requirements.

Experience Level

Senior-level — requires 6+ years of relevant experience in RTL design and place-and-route (PnR) flows.

Responsibilities

Primary responsibilities span design implementation, verification, and flow improvement:

• Design semicustom digital blocks (control logic, BIST, DfT); define interfaces and functional requirements.
• Participate in RTL-to-GDS flow: synthesis, timing constraint development, placement, CTS, routing, and timing closure.
• Implement RTL following digital and characterization-friendly design guidelines to meet PPAC targets.
• Perform functional and gate-level verification, including equivalence checking and development of testbenches.
• Collaborate with block owners and integration teams to ensure full-chip integration and support silicon bring-up, post-silicon validation and debug.
• Support semicustom flow setup and continuous improvement; develop and maintain scripting environments and technical documentation.
• Apply AI-driven tools and automation to streamline workflows and improve design efficiency.

Requirements

Must-have technical skills and tool experience; concise list of expectations.

• 6+ years of hands-on experience in RTL design and PnR flows (synthesis, STA, place-and-route).
• Proficiency with synthesis and implementation tools: Synopsys Fusion Compiler / Design Compiler; Synopsys ICC2 for PnR.
• Static timing analysis experience with Synopsys PrimeTime and multi-corner STA methodologies.
• Experience with simulation and verification tools: Cadence Xcelium / NCSim or Synopsys VCS; equivalence checking with Synopsys Formality.
• Experience with gate-level simulations, timing closure, and power analysis workflows.
• Scripting proficiency (Tcl, Perl, Python or similar) and familiarity with Unix/Linux environments.
• Understanding of clocking concepts, synthesis constraints, CMOS circuit fundamentals, and full-chip integration challenges.
• Nice-to-have: power analysis tools (ANSYS RedHawk / Totem), full-custom methodology experience, prior use of AI-driven design tools.

Education Requirements

Bachelor's or Master's degree in Electrical/Electronics Engineering, Computer Engineering, or equivalent technical field — or equivalent practical experience.

For assistance with the application process or for reasonable accommodations, contact HR at hrsupport_india@micron.com.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.