Staff Engineer — HBM PE Component Validation

Job Title

Staff Engineer — HBM PE Component Validation

Role Summary

Lead validation engineering for HBM platform components at Fab 10A, Singapore. Drive end-to-end validation execution, platform enablement, Verilog simulation, data analysis, and silicon debug to ensure product performance and reliability.

Experience Level

Senior level. The role expects 8+ years of experience in DRAM/HBM/NAND validation or product engineering, including at least 2 years specifically in HBM validation.

Responsibilities

Primary responsibilities include planning and executing validation cycles, developing test programs and simulations, and driving cross-functional debug and continuous improvement.

• Lead end-to-end validation run execution, ensuring on-schedule starts/completions, risk-aware replans, and efficient material usage.
• Own time-bound data pipelines (log parsing, metrics aggregation, anomaly ranking) and deliver decision-ready summary reports.
• Ensure coverage completeness across validation flows (hot/cold corners, screen, timing boundary) with evidence-backed closure.
• Develop and debug test programs on ATE platforms (Advantest, in-house); enforce code quality and release discipline.
• Align hardware configurations (handler, socket, loadboard, probe card) to test intent and throughput targets.
• Perform power/thermal characterization and correlate IDD/thermal data with performance and reliability; recommend content or silicon fixes.
• Author and run Verilog simulations (bench creation, stimulus/checkers, waveform analysis) to reproduce sightings and de-risk changes.
• Build automation scripts and dashboards for anomaly detection, trend analysis, and coverage auditing.
• Lead silicon debug with Design, Verification, Quality, and System Engineering and drive corrective action closure with root-cause evidence.
• Implement cycle-time optimization (parallelization, sampling, content pruning, throughput tuning) and contribute to DFMEA gap closure.
• Coach junior engineers on validation best practices, simulation methodology, and reporting standards; collaborate with global teams for material readiness.

Requirements

Must-have technical skills and experience are listed first; a few desirable items follow.

• Must-have: 8+ years in DRAM/HBM/NAND validation or product engineering; at least 2 years HBM validation experience.
• Must-have: Test platform code development in C/C++, Python, and APG (Algorithmic Pattern Generator).
• Must-have: Hands-on ATE experience (Advantest, Teradyne) and Verilog simulation expertise (bench architecture, stimulus/checkers, waveform/log analysis).
• Must-have: Proven ability to execute validations and perform high-speed I/O validation with eye and IDD characterization.
• Must-have: Advanced scripting and data analytics skills; experience with Confluence/Jira and source control (Git/Perforce).
• Must-have: Strong analog and digital circuit understanding and practical silicon debug experience across functions.
• Nice-to-have: Experience aligning handler, socket, loadboard, and probe card configurations to test intent and throughput targets.
• Nice-to-have: Familiarity with AI tools to improve productivity, code development, or data analysis.

Education Requirements

Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field is required (e.g., EE, CE, Computer Science, Physics, Mathematics).

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.