Staff Engineer - HBM Layout

Job Title

Staff Engineer - HBM Layout

Role Summary

Work on layout design for High Bandwidth Memory (HBM) within Micron’s Hyderabad HBM team, collaborating with global peers across multiple projects. The role focuses on custom/analog and mixed-signal layout, reticle and full-chip integration, and advanced packaging interactions for AI and high-performance computing applications.

Experience Level

Senior — typically 8 to 15 years of experience in analog/custom layout design and advanced CMOS process nodes.

Responsibilities

Key responsibilities include detailed layout work, verification, and coordination across chip and packaging teams.

• Design and develop critical mixed-signal and custom digital blocks and support full-chip integration and co-optimization objectives.
• Develop and tape out PWF reticle designs; support reticle development and full-chip verification.
• Coordinate with scribe design and advanced packaging teams; incorporate TSV, electrical, thermal, and mechanical performance requirements.
• Create and maintain DFMEA for advanced packaging processes (PWF, die stacking, etc.).
• Perform physical layout verification (LVS/DRC/antenna checks), quality control, and documentation.
• Ensure on-time delivery of block-level layouts with required quality; estimate area/time and manage schedules across multiple projects.
• Mentor and review work of junior layout engineers; contribute to project management and cross-site communication.

Requirements

Must-have technical skills, tools, and experience. Preferred or additional strengths are noted where applicable.

• 8 to 15 years of hands-on experience in analog/custom layout design across advanced CMOS nodes (Planar, FinFET).
• Expertise with Cadence VLE/VXL and Mentor Graphics Calibre DRC/LVS is required.
• Proven experience creating layouts for critical analog/mixed-signal blocks (temperature sensors, PLLs, ADCs/DACs, LDOs, bandgaps, reference generators, charge pumps, current mirrors, comparators, differential amplifiers, etc.).
• Experience with reticle development and full-chip verification workflows.
• Ability to automate layout tasks and use AI-assisted features to improve execution speed and quality.
• Strong understanding of layout fundamentals (matching, electromigration, latch-up, coupling/crosstalk, IR drop, parasitics) and their impact on speed, capacitance, power, and area.
• Proven problem-solving skills in physical verification of custom layouts.
• Experience supporting multiple tape-outs and managing multiple layout projects with rigorous quality checks is an advantage.
• Excellent verbal and written communication skills.

Education Requirements

BE or MTech in Electronics / VLSI Engineering.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.