Job Title
Staff Engineer - DFT
Role Summary
Responsible for DFT implementation and testability for Ambiq's ultra-low-power SoC products. Works on scan insertion, boundary scan, MBIST and ATPG using standard EDA tools, and develops low-power DFT architectures and infrastructure.
Collaborates with RTL designers, STA, physical/power teams and test engineers to optimize coverage, test time and bring-up on silicon. Location: Changhua, Taiwan.
Experience Level
Senior β minimum 10 years of DFT implementation experience.
Responsibilities
Key responsibilities include:
- Perform scan insertion, boundary scan, MBIST and ATPG for ultra-low-power SoCs.
- Design and implement low-power DFT architecture and infrastructure.
- Generate structural test vectors; analyze and improve coverage, test time and cost.
- Run pre- and post-layout scan and MBIST simulations.
- Coordinate with designers on STA, physical, power and logical issues related to DFT.
- Work with test engineers to bring up test vectors on silicon and support production test.
Requirements
Must-have skills and experience:
- At least 10 years' experience in DFT implementation for SoC products.
- Expertise in scan (stuck-at, at-speed, path-delay), scan compression, boundary scan and MBIST.
- Experience creating and implementing hierarchical DFT architecture in complex SoCs.
- Experience with low-power DFT techniques and MBIST.
- Experience analyzing test time and coverage for scan and MBIST patterns.
- Extensive knowledge of timing concepts and constraints; RTL experience required.
- Experience developing ATPG and MBIST testbenches and pre/post-layout simulation flows.
- Strong verbal and written English communication skills; self-motivated with attention to detail.
Nice-to-have:
- Scripting experience (Tcl).
- Gate-level simulation (GLS) experience.
Education Requirements
BS or MS in Electrical/Electronic/Computer Engineering (ECE/EE), or equivalent practical experience.
About the Company
Company: Ambiq
Headquarters: Austin, TX, United States
Semiconductor company developing ultra-low-power microcontroller units (MCUs) and system-on-chip (SoC) platforms for battery-powered and edge devices, focusing on low-power IP, RTL, and production silicon solutions.

Date Posted: 2026-07-28