Staff Engineer - DFT

Job Title

Staff Engineer - DFT

Role Summary

The Staff Engineer - DFT will design and deliver design-for-test solutions across the full custom silicon cycle, from early DFT architecture planning to silicon qualification and delivery. The role requires close collaboration with RTL, physical design, test and product engineering teams and alignment with customer requirements.

Experience Level

Senior-level (Staff). Typical background includes several years of DFT experience; the team expects candidates with practical end-to-end DFT implementation experience (see Education Requirements for degree guidance).

Responsibilities

Primary responsibilities include architecture, implementation, verification, and ownership of chip-level DFT features.

• Define and implement comprehensive DFT architectures during early design phases.
• Insert and validate scan chains and MBIST using industry-standard EDA tools.
• Create and execute DFT verification plans including pattern generation and fault simulation.
• Collaborate with RTL, physical design, test engineering and product teams to resolve DFT-related issues.
• Document DFT architectures, verification results and handover artifacts for silicon qualification.
• Serve as primary DFT point-of-contact and lead implementation to meet customer requirements.
• Support silicon bring-up and debug related to DFT features.

Requirements

Core technical and leadership qualifications. Education specifics are summarized under Education Requirements.

• Must-have: 2+ years of practical DFT experience (industry experience implementing scan/MBIST and verification flows).
• Must-have: Proven ability to lead DFT implementation and guide team members through full-chip DFT delivery.
• Must-have: Deep knowledge of advanced DFT techniques and ATPG, pattern generation, and fault simulation workflows.
• Must-have: Experience using industry-standard DFT/EDA tools and integrating DFT into standard design flows.
• Nice-to-have: Experience on very large designs, multi-die testing, in-system test (IST) or SSN-related DFT methods.
• Nice-to-have: Experience developing DFT tools/methodologies and hands-on silicon debug of DFT features.

Education Requirements

Degree preferred: Bachelor's (BTech/BS) or higher in Computer Science, Electrical/Electronics Engineering, Engineering or a related technical field. The posting also lists Master's (MTech/MS) and PhD as acceptable. Specific minimums noted in the source: Bachelor's with ~2+ years relevant experience, Master's with ~1+ year, or PhD (experience expectations vary by degree).

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.