Staff Engineer — Design Verification (VIP)

Job Title

Staff Engineer — Design Verification (Verification IP)

Role Summary

Senior verification engineer responsible for designing, implementing, and maintaining Verification IP (VIP) for industry-standard protocols and supporting customer deployments. The role works with protocol experts, design IP teams, and field teams to deliver scalable, coverage-driven VIP used in SoC verification flows.

Experience Level

Senior — typically 5+ years of relevant hands-on experience developing Verification IP and verification environments.

Responsibilities

Primary responsibilities focus on VIP development, verification planning, and customer support.

• Design, develop, and maintain VIP using SystemVerilog and UVM for protocols such as AMBA, PCIe, USB, Ethernet, UEC, UAL, and MIPI.
• Create comprehensive verification plans mapping protocol specs to test scenarios, coverage goals, and corner-case strategies.
• Implement sequences, test scenarios, and checkers to drive functional and code-coverage verification.
• Debug complex simulation failures across multi-layer protocol stacks and customer integration environments to identify root causes.
• Improve VIP performance, reusability, and scalability as protocols and customer use cases evolve.
• Support customer integrations and deployments, troubleshoot issues, and work with field teams to ensure successful bring-up.
• Collaborate with design, R&D, and product teams to align VIP capabilities with product roadmaps and customer needs.

Requirements

Must-have technical skills and experience; items labeled "Preferred" are nice-to-have.

• 5+ years hands-on experience developing Verification IP (must).
• Strong proficiency in SystemVerilog and UVM methodology for building reusable, scalable verification environments (must).
• Specialization in NVMe (mandatory); working experience with PCIe is desirable. Deep working knowledge of at least two protocols among USB, Ethernet, or MIPI (must/strongly preferred).
• Hands-on experience with BFMs, IP/VIP development, and integration (must).
• Proven ability to create and execute coverage-driven verification plans, including functional and code coverage analysis (must).
• Experience debugging complex simulation failures and resolving multi-layer protocol issues (must).
• Experience working directly with customers or field teams during product deployment (preferred).
• Strong problem-solving skills, ability to work independently or in a team, and good communication skills (must).

Education Requirements

Bachelor's or Master's degree in Electronics Engineering, Computer Science, or equivalent practical experience. Equivalent practical experience is explicitly accepted in lieu of degree.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.