Staff Engineer - Design

Job Title

Staff Engineer - Design

Role Summary

Design and optimize block- and sub-system-level circuits and timing for NAND/Flash products, supervise layout activities, and collaborate with logic, technology, and project teams to integrate arrays into full-chip floorplans.

Accountable for circuit-level optimization and verification across scales (base cells to full chip), mentoring junior engineers, and documenting block/sub-system micro-architecture specifications to applicable industry standards.

Experience Level

Mid-level. Role expects roughly 2–10 years of semiconductor industry experience depending on prior qualifications.

Responsibilities

Primary responsibilities for this role include design, optimization, verification, and documentation of memory array and mixed-signal circuits and supporting full-chip integration.

• Perform block- and sub-system-level circuit design and timing optimization; supervise layout activities.
• Collaborate with logic and technology teams to define full-chip floorplan and integrate core circuits.
• Develop and finalize array waveforms with technology development teams.
• Perform circuit optimization and verification using HSPICE, Fast SPICE, ncVerilog, and related tools from cell to full-chip levels.
• Mentor and train junior design engineers; provide technical guidance and reviews.
• Prepare and maintain micro-architecture specifications and documentation in accordance with industry standards (e.g., ISO26262).

Requirements

Key technical and interpersonal requirements; listed as must-have vs. nice-to-have where possible.

• Must-have: Deep knowledge of digital, analog, and mixed-signal circuit design; strong understanding of CMOS device physics; experience with FLASH/NAND array behavior and reliability mechanisms.
• Must-have: Hands-on experience with analog and digital simulation tools such as HSPICE, Fast SPICE, and ncVerilog.
• Must-have: Strong verbal communication skills in English; ability to work effectively in fast-moving, cross-functional teams.
• Must-have: Familiarity with computer architecture, storage devices, and NAND memory system concepts.
• Nice-to-have: Experience supervising layout or interfacing closely with layout teams; prior experience documenting to functional safety or similar industry standards.
• Nice-to-have: Familiarity with AI-assisted engineering tools and the ability to critically evaluate AI-generated outputs.

Education Requirements

Listed requirements indicate graduate or undergraduate degree experience expectations: MS or PhD candidates typically expected to have ~2–6 years of semiconductor industry experience; BS candidates typically expected to have ~6–10 years of semiconductor industry experience. The posting explicitly references advanced degrees (MS/PhD) and BS-level qualifications tied to years of experience.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.