Staff Engineer, CPU Core Verification

Job Title

Staff Engineer, CPU Core Verification

Role Summary

Owner of CPU core-level functional verification for high-performance, out-of-order RISC-V CPU cores. Work across pre-silicon simulation, emulation, and post-silicon validation to ensure correctness and delivery of robust CPU cores and clusters.

This is a hybrid role based out of Bangalore, India.

Experience Level

Senior — typically 8+ years of experience in CPU verification or closely related digital design roles; level will be confirmed during interview.

Responsibilities

Lead planning and execution of verification activities for CPU core features and complex microarchitectural scenarios.

• Plan and drive functional verification for CPU core features and microarchitectural corner cases.
• Develop UVM testbenches and stimulus, plus assembly and C/C++ tests and functional models for ISA and extensions.
• Debug simulation and emulation regressions using RTL knowledge, waveforms, and log analysis.
• Build and improve coverage models, test infrastructure, and automation to achieve coverage closure.
• Collaborate with design, validation, emulation, and post-silicon teams to support bring-up and delivery.

Requirements

Must-have technical skills and experience for immediate impact; concise list of preferred additions follows.

• Must-have: 8+ years in CPU verification or closely related digital design; deep understanding of high-performance out-of-order CPU microarchitecture.
• Must-have: Hands-on experience with RTL, UVM-based verification, simulation and emulation flows, and testbench/debug infrastructure.
• Must-have: Experience writing assembly and C/C++ stimulus, creating functional models, and developing coverage-driven tests for ISA and extensions.
• Must-have: Strong debug skills using waveforms, logs, and RTL familiarity to identify and resolve complex failures.
• Must-have: Ability to collaborate across design, DV, emulation, and post-silicon teams to drive issues to closure.
• Nice-to-have: Prior work with RISC-V ISA and extensions, emulation-to-silicon flows, and scaling shared stimulus across multiple CPU programs.
• Nice-to-have: Experience with coverage scaling, post-silicon validation, or open hardware toolchains.
• Condition: Employment may be contingent on eligibility to access U.S. export-controlled technology; offers may depend on citizenship, residency, or required licenses.

Education Requirements

Not specified.

About the Company

Company: Tenstorrent

Headquarters: Austin, Texas, United States

Tenstorrent is a technology company focused on designing innovative computing solutions. They are known for their expertise in the development of advanced hardware, including ASICs and SoCs, aimed at enhancing performance and efficiency in various applications.