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Staff Engineer, Applications Engineering

Synopsys
June 10, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Physical Design Jobs, Level - Senior

Job Title

Staff Engineer, Applications Engineering

Role Summary

Provide expert applications engineering support for customers across the full ASIC flow with a focus on physical implementation. Work with customer design teams to diagnose and resolve placement, CTS, routing, and timing closure challenges at advanced process nodes.

Position sits in the Customer Success Group in Bengaluru and involves direct customer engagements, technical enablement, and close collaboration with sales and product teams to improve tool usage and product direction.

Experience Level

Senior-level β€” typically experienced practitioners who have handled complex tapeout-support engagements and advanced-node implementation challenges (see Education Requirements for degree-and-experience equivalency).

Responsibilities

Primary responsibilities include technical customer support, methodology guidance, and cross-team feedback to improve tools and customer outcomes.

  • Support customer engagements across RTL-to-GDSII flows with emphasis on physical implementation.
  • Debug placement, optimization, CTS, routing, and timing closure issues at advanced nodes.
  • Guide customers on advanced methodologies, including AI-driven placement, macro placement strategies, and multi-scenario timing closure.
  • Work onsite with customer design teams to diagnose tool usage and recommend flow improvements for production environments.
  • Deliver technical presentations, training, and design reviews to transfer actionable strategies to customers.
  • Collaborate with sales, R&D, and product teams to reproduce critical issues and influence product direction using customer feedback.
  • Maintain current knowledge of advanced-node design requirements and emerging implementation methodologies.

Requirements

Must-have technical skills and experience for successful performance in this role.

  • Deep hands-on experience with RTL-to-GDSII implementation flows: placement, optimization, clock tree synthesis, routing, and timing closure.
  • Proven, practical experience using Synopsys backend tools, specifically Fusion Compiler and ICC2, in production designs.
  • Strong knowledge of advanced-node design challenges (multi-corner multi-mode timing, noise issues, routing at advanced nodes) and how to mitigate them in real projects.
  • Demonstrated ability to work directly with customers to diagnose issues and deliver solutions under schedule pressure.
  • Ability to present technical material, run trainings, and translate tool capabilities into actionable customer strategies.
  • Experience collaborating with sales and R&D to escalate and resolve production blockers.
  • Nice-to-have: hands-on experience with Design Compiler (synthesis) and PrimeTime (static timing analysis).
  • Nice-to-have: familiarity with clock tree synthesis methodologies such as H-Tree and MS-CTS.

Education Requirements

Posting requests a Bachelor's degree in Electrical Engineering (or equivalent) with 7+ years of ASIC physical design experience, or a Master's degree with 5+ years; the employer also accepts equivalent practical experience in lieu of a degree.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-06-08