Staff Emulation Build Quality, Performance & Debug Engineer
QualcommJob Title
Staff Emulation Build Quality, Performance & Debug Engineer
Role Summary
Join Qualcomm's Emulation Performance, Quality, and Debug team within the central SoC digital hardware organization. The role focuses on improving emulation build performance, build quality, and debug productivity across pre-silicon emulation platforms and supporting SoC bring-up and validation.
Work involves cross-functional collaboration with architects, designers, verification, software, CAD, and system teams to identify root causes and deploy scalable solutions across multiple SoC programs.
Experience Level
Senior - role expects substantial experience. Preferred: 7+ years working in emulation and silicon environments; the posting includes degree-dependent minimum experience (see Education Requirements).
Responsibilities
Primary responsibilities focus on improving emulation build efficiency, diagnosing complex hardware/software issues, and developing methodologies to increase quality and debug productivity.
- Analyze and optimize emulation build performance and runtime.
- Perform root-cause analysis of build failures, timing, clocking, and functional issues across emulation platforms.
- Develop and deploy automation, metrics, and methodologies to improve build quality and debug efficiency.
- Drive cross-site and cross-team technical initiatives from problem identification through scalable solution deployment.
- Lead complex debug efforts involving emulation infrastructure, FPGA implementation, hardware, and software.
- Bring up and validate pre-silicon prototyping and FPGA emulation hardware and software.
- Collaborate with vendors and present findings to engineering leadership.
- Mentor and provide technical leadership to junior engineers.
Requirements
Must-have skills and experience (concise):
- Significant hands-on experience with emulation platforms and FPGA prototyping (examples in posting: FPGA prototyping, Veloce, Palladium).
- Expertise in build performance analysis, synthesis/place-and-route constraints, timing closure, and clocking.
- Strong debug skills: waveform generation, content debug, JTAG, and kernel debuggers.
- Proficiency in Verilog / SystemVerilog and C.
- Scripting proficiency in Python and TCL.
- Experience with Xilinx/Intel FPGAs, tools, and timing-closure techniques.
- Ability to perform cross-functional root-cause analysis and implement long-term corrective actions.
- Proven track record driving technical initiatives, collaborating across architecture, design, verification, software, CAD, and systems teams.
Nice-to-have:
- Experience developing uniform global methodologies for emulation build generation and debug across FPGA-based platforms.
- Background in SoC building blocks (CPU/DSP, multimedia, IO, DDR, modem, interconnects) and basic power/performance understanding.
Education Requirements
The posting specifies degree-dependent minimum experience. One set of requirements: Bachelor's degree in Science, Engineering, or related field plus 6+ years of ASIC design/verification/validation/integration experience; Master's plus 5+ years; PhD plus 4+ years. A separate "Minimum Qualifications" section lists lower thresholds: Bachelor's plus 4+ years; Master's plus 3+ years; PhD plus 2+ years. Fields mentioned: Science, Engineering, or related field. No specific certifications or explicit "equivalent experience" phrasing was provided.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
