Staff EMIB-T Substrate Yield Engineer

Job Title

Staff EMIB-T Substrate Yield Engineer

Role Summary

Lead yield performance, defect reduction, and process-control maturity for next-generation EMIB-T substrates working with supplier lines in Japan. The role supports technology development, qualification, and manufacturing readiness for advanced packaging across Intel Foundry Services and Intel Product Groups.

This is a high-visibility, high-accountability technical leadership role requiring an expatriate assignment in Japan and frequent cross-functional engagement with suppliers and internal stakeholders.

Experience Level

Senior-level. Typical background: Master's degree +6 years or PhD +4 years in a relevant technical field; at least 5 years of semiconductor/advanced packaging or yield engineering experience is expected.

Responsibilities

Drive supplier yield and technical issue closure from containment through sustainment and support readiness activities for product ramps.

• Own day-to-day yield performance and issue closure for assigned supplier lines, modules, products, or process areas.
• Lead structured investigations: containment, hypothesis, experiments, failure analysis, corrective action, and sustainment.
• Apply statistical and spatial analytics to identify signatures by line, tool, material, panel position, geometry, product, and time.
• Define supplier actions, owners, completion criteria, control limits, and verification plans.
• Support DFM/DFY, qualification, ramp readiness, change control, and deployment of dashboards or automated analytics.
• Coordinate cross-functional teams and external suppliers to drive technical decisions and program milestones to closure.
• Capture and communicate reusable learning, facts, hypotheses, decisions, and residual risks.

Requirements

Must-have technical skills and experience for immediate impact, plus preferred skills that increase effectiveness in the role.

Must-have:

• 5+ years experience in semiconductor manufacturing, advanced packaging, substrate technology, yield engineering, process engineering, or closely related roles.
• Hands-on substrate or advanced packaging yield engineering experience: statistical analysis, SPC, defect reduction, process optimization, DFM/DFY, defect metrology, and failure analysis.
• Proven ability to independently manage complex technical issues, execute with urgency, and drive actions to closure across multiple organizations.
• Experience developing or deploying yield monitoring systems, automated analytics, dashboards, image analytics, computer vision, or AI/ML-based defect detection or classification.
• Strong analytical and problem-solving skills and experience making data-driven decisions in complex environments.

Nice-to-have:

• Experience working directly with substrate suppliers and external manufacturing partners.
• Program leadership experience coordinating cross-functional technical teams in high-visibility projects.
• Experience with semi-additive processing, build-up films, microvias, copper plating, lithography, lamination, embedded silicon, TSV, or 2.5D/3D heterogeneous integration.
• Experience with automated data pipelines and advanced image analytics for defect detection.

Education Requirements

Master's degree with 6+ years or PhD with 4+ years in Engineering, Materials Science, Physics, Chemistry, Data Science, or a related technical discipline as stated in the minimum qualifications.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.