Staff Digital Design Verification Engineer

Job Title

Staff Digital Design Verification Engineer

Role Summary

Join the High-Speed Interconnect (HSI) team to own end-to-end digital design verification for high-performance SerDes and protocol IP used in compute and data-center applications. The role focuses on functional, performance, and power verification across pre-silicon and post-silicon stages and requires cross-functional collaboration with design, firmware, systems, and SoC teams.

Experience Level

Senior. Qualcomm's listed minimum experience varies by degree: Bachelor's +4 years, Master's +3 years, PhD +2 years (see Education Requirements).

Responsibilities

Key responsibilities include planning and executing verification efforts, improving verification methodology, and supporting bring-up activities.

• Own end-to-end verification of new features and optimizations for SerDes and protocol IP.
• Verify support for protocols such as Ethernet and PCIe; ensure functional, performance, and power goals are met.
• Develop and maintain verification plans, testbenches, and constraints; analyze simulation failures.
• Integrate third-party VIP for protocol compliance testing.
• Apply formal and power-aware verification techniques where applicable.
• Use AI-enabled tools and automation to accelerate verification flows.
• Coordinate with technical and project managers to create schedules and drive delivery.
• Lead and mentor team members; participate in post-silicon validation and debug.

Requirements

Core technical skills and experience required for successful performance in this role.

Must-have:

• ASIC design verification experience, including coding in Verilog/SystemVerilog.
• Applied knowledge of UVM and constrained-random verification methodologies.
• Experience with formal verification and power-aware verification techniques.
• Proficiency with scripting and software tools: Python, Perl, C/C++, GNU Make; comfortable in Linux/Unix.
• Strong problem solving, communication, organizational skills, and ability to deliver multiple parallel programs on schedule.
• Demonstrated technical leadership and ability to drive initiatives to completion.

Nice-to-have:

• Experience with Ethernet, PCIe, SerDes PHY, DSP, and mixed-signal IP.
• Familiarity with EDA tool flows and integrating third-party VIPs.

Education Requirements

One of the following: Bachelor's degree in Science, Engineering, or a related field plus 4+ years of relevant ASIC design/verification/validation/integration experience; or Master's degree in Science, Engineering, or related field plus 3+ years; or PhD in Science, Engineering, or related field plus 2+ years.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.