Staff Digital Design Engineer (AI/ML)

Job Title

Staff Digital Design Engineer (AI/ML)

Role Summary

Develop complex digital subsystems for mixed-signal and power-management ICs and apply AI/ML techniques to improve digital design automation, optimization, and productivity across the digital design flow. Work spans specification through tape-out, silicon validation, and production release while collaborating with analog, verification, and applications teams.

Experience Level

Senior level. Preferred 7+ years of digital IC design experience for masters degree holders; PhD holders with 5+ years will also be considered. (Experienced individual contributor role.)

Responsibilities

Primary responsibilities include design ownership and process improvements using AI/ML.

• Apply AI/ML methods to enhance synthesis results, timing closure, power estimation, and design-space exploration.
• Specify, implement, and optimize digital subsystems (control logic, interfaces, on-chip processing) for mixed-signal SoCs.
• Write and optimize RTL in Verilog/SystemVerilog for performance, area, and power targets.
• Perform synthesis with timing/place constraints, static timing and power analysis, and logical equivalence checking.
• Participate in architecture and design reviews; analyze timing, area, power, and testability trade-offs.
• Collaborate with analog teams to implement digital-analog interfaces and control architectures and support silicon bring-up and production validation.
• Share AI/ML-driven workflow improvements and best practices with cross-functional teams.

Requirements

Must-have technical skills and experience. Preferred items listed after must-haves.

• Must have: Strong RTL design and delivery experience in Verilog/SystemVerilog for complex digital subsystems, including tape-out and silicon validation.
• Must have: Practical experience with synthesis, static timing analysis, DFT (scan, ATPG, BIST), and clock-domain crossing methodologies.
• Must have: Scripting skills (Python, Tcl, shell) and experience applying AI/ML techniques to improve design productivity.
• Must have: Proficiency with Cadence digital design toolflow: Genus, Innovus, Tempus, Conformal.
• Must have: Strong presentation, technical writing, and communication skills.
• Nice to have: Place-and-route, floorplanning, and physical-aware design experience.
• Nice to have: Low-power design techniques (multi-voltage domains, power gating, UPF) and mixed-signal SoC integration experience.
• Nice to have: Familiarity with digital interfaces (I2C, SPI, UART) and formal verification, lint, and CDC analysis.

Education Requirements

Graduate degree preferred: MSEE or MSCE with 7+ years of relevant digital IC design experience, or PhD with 5+ years. BSEE/BSCE candidates with equivalent practical experience may be considered. (Equivalent practical experience acceptable where specified.)

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.