Staff Design Verification Engineer (AI/ML)

Job Title

Staff Design Verification Engineer (AI/ML)

Role Summary

Develop and execute verification strategies for complex analog and mixed-signal ICs, applying AI/ML to improve regression efficiency, debug throughput, and coverage analysis. Contribute to product quality and delivery across business units, driving verification toward tape-out readiness.

Experience Level

Senior-level. Typical background: MSEE/MSCE with 7+ years of IC verification experience or PhD with 5+ years; equivalent industry experience considered.

Responsibilities

Primary responsibilities include verification planning, testbench and tool development, coverage closure, and collaboration with design and test teams.

• Apply AI/ML for failure clustering, regression triage, anomaly detection, and coverage optimization.
• Develop and execute verification plans and coverage models for mixed-signal IC blocks and subsystems.
• Build and maintain SystemVerilog/UVM testbenches, monitors, scoreboards, and automated checkers.
• Perform functional coverage analysis and drive coverage closure toward tape-out readiness.
• Support silicon correlation by comparing simulation expectations against lab measurements and refining tests.
• Participate in verification reviews and cross-team technical discussions.
• Author test plans, manage regressions, and take block- and subsystem-level verification ownership.

Requirements

Must-have technical skills and experience. Preferred skills listed below.

• Proficiency in SystemVerilog and UVM with experience in coverage-driven verification environments for mixed-signal products.
• Proven record delivering verification through tape-out sign-off and production release.
• Strong Python scripting skills and practical experience applying AI/ML techniques to verification workflows.
• Knowledge of formal verification, assertion-based methodology, and clock domain crossing analysis.
• Experience with Cadence verification tools such as Xcelium and JasperGold.
• Excellent presentation, technical writing, and communication skills.

Nice-to-have:

• Experience with Verilog-AMS, real-number modeling, behavioral abstraction, and mixed-signal verification techniques.
• Experience with gate-level simulation, SDF back-annotation, and post-layout verification.
• Strong analytical problem-solving ability and collaborative teamwork experience.

Education Requirements

MSEE or MSCE with 7+ years of IC verification experience, or PhD with 5+ years. BSEE/BSCE considered with equivalent depth of practical experience. Equivalent practical experience may be acceptable.

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.