Staff DFT Engineer
Member of the Custom Silicon Design-for-Test (DFT) team responsible for implementing and verifying on-chip testability for high-speed custom silicon. The role spans DFT insertion, ATPG and MBIST flows, pattern generation, simulation, and manufacturing test support across the chip lifecycle.
Senior (Staff). The posting indicates mid-to-senior level responsibilities and technical leadership within DFT flows; approximate experience guidance in the posting ranges from a few to several years depending on background.
Execute and improve DFT methodologies and test flows for custom silicon designs; support pattern debug and manufacturing bring-up.
Key technical skills and tools required for successful performance in this role.
Posting specifies: Bachelor of Science in Computer or Electrical Engineering with at least 3–5 years of related professional experience, OR Master of Science in Computer or Electrical Engineering with at least 2–3 years of related professional experience, OR PhD in Computer or Electrical Engineering.
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.
