Staff DFT Engineer

Job Title

Staff DFT Engineer

Role Summary

Work on Design-for-Test (DFT) for SoCs and sub-systems within Arm's Solutions group, collaborating with RTL, verification, physical implementation, and test teams through design, tape-out and silicon characterization. Focus on DFT architecture, insertion, validation, ATPG and silicon debug for client, datacenter, automotive and IoT products.

Experience Level

Senior level — the role targets an experienced engineer (10+ years) in Design for Test.

Responsibilities

Deliver DFT features across SoC projects and work with cross-functional teams to ensure testability and timing closure.

• Architect, implement and validate DFT techniques for SoC and sub-systems.
• Insert DFT logic and validate features using industry-standard simulation tools.
• Run RTL and gate-level simulations including timing-annotated flows.
• Generate ATPG patterns, analyze coverage and debug to meet targets.
• Define and validate DFT timing requirements; review timing reports and provide fixes for timing issues.
• Support DFT RTL insertion, synthesis/scan insertion, place-and-route and static timing analysis with implementation teams.
• Participate in ATE test pattern development, validation and silicon debug/characterization.
• Collaborate with product and test engineering teams on silicon bring-up and diagnostics.

Requirements

Must-have technical skills and experience for delivery on complex SoC DFT projects.

• 10+ years of professional experience in Design-for-Test for SoC or subsystem projects.
• Hands-on experience with DFT tool flows and methodologies: ATPG, fault simulation, scan insertion/compression, back-annotated gate-level verification and silicon debug.
• Experience with Siemens DFT tools and familiarity with Streaming Scan Network (SSN).
• Experience implementing Memory BIST and repair schemes, Logic BIST, and JTAG/IJTAG.
• Coding experience in Verilog RTL and scripting (TCL and/or Perl).
• Experience using Cadence and/or Synopsys DFT and simulation tools.
• Strong problem-solving skills for coverage/debug and timing closure in DFT contexts.

Nice-to-have:

• Familiarity with SoC architectures (multi-clock domains, low-power design practices).
• Experience with Arm IP (Cortex CPUs, Mali GPUs, AMBA, CoreLink, CoreSight).
• Background in high-performance implementation and DFT timing constraints; datacenter chip experience.
• Experience with 2.5D/3D test and advanced packaging test flows.
• Strong communication skills across teams and time zones.

Education Requirements

Bachelor's or Master’s degree in Electronic Engineering, Computer Engineering, or a related field.

About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.