Staff Design Verification Engineer – SoC and eFPGA

Job Title

Staff Design Verification Engineer – SoC and eFPGA

Role Summary

Senior verification engineer responsible for planning and executing digital design verification for embedded FPGA (eFPGA) soft logic and SoC subsystems. The role partners with architecture, RTL, firmware, and software teams to define verification strategies and deliver production-quality silicon.

Experience Level

Senior level. Preferred experience: 5+ years in SoC, subsystem, or microarchitecture verification (recommended, not strictly required).

Responsibilities

Work across teams to verify complex subsystems, design verification environments, and support end-to-end silicon flows.

• Partner with architecture, RTL, firmware, and software teams to define verification strategies for new features and system-level behavior.
• Develop detailed verification plans covering feature interactions, hardware/software use cases, and system behavior.
• Design, implement, and maintain directed and constrained-random verification environments and test suites (UVM).
• Develop SystemVerilog assertions and functional coverage models; analyze coverage metrics and close coverage gaps.
• Debug simulation failures, perform waveform analysis, identify root causes, and collaborate with design/firmware engineers to resolve issues.
• Build and support end-to-end verification flows for eFPGA soft logic within SoCs, including RTL simulation, synthesis validation, and bitstream generation.
• Contribute to verification methodology improvements, automation, continuous integration, and regression workflows.

Requirements

Must-have technical skills, tools, and domain knowledge for successful performance in this role.

• Strong understanding of SoC architectures and industry bus protocols (e.g., AXI, AHB).
• Experience debugging RTL and firmware with simulation and waveform analysis tools.
• Hands-on experience developing UVM-based verification environments.
• Proficiency in SystemVerilog, Verilog, C/C++, and Python.
• Experience developing automation solutions and working within distributed compute environments.
• Working knowledge of SystemC and Transaction-Level Modeling (TLM).
• Solid understanding of digital design fundamentals, computer architecture, timing and power analysis, process variation, and reliability considerations.
• Strong communication and collaboration skills to work across multidisciplinary teams.

Nice-to-have:

• Experience supporting silicon tape-outs in advanced process nodes (N4, N5 or similar).
• Knowledge of Functional Safety (FuSA) requirements and safety-focused verification methods.
• Experience with FPGA or programmable logic architectures.
• Familiarity with continuous integration, regression automation, and verification productivity tools.

Education Requirements

Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent industry experience. Related technical fields and equivalent practical experience are acceptable.

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.