Staff Design Verification Engineer – SoC and eFPGA

Job Title

Staff Design Verification Engineer – SoC and eFPGA

Role Summary

Join the eFPGA and SoC verification team to develop and validate next-generation embedded FPGA technology and the SoCs that integrate it. The role focuses on planning and executing verification for complex subsystems, building UVM-based environments, writing assertions and coverage, and supporting end-to-end silicon verification flows.

Experience Level

Senior-level. Preferred candidates have 5+ years of verification experience in SoC, subsystem, or microarchitecture verification.

Responsibilities

Primary responsibilities include defining and executing verification strategies across RTL, firmware, and system interactions.

• Partner with architecture, RTL, firmware, and software teams to define verification scope and strategies.
• Create detailed verification plans addressing feature interactions, system behavior, and HW/SW use cases.
• Design, implement, and maintain directed and constrained-random UVM testbenches and test suites.
• Develop SystemVerilog assertions and functional coverage models; analyze coverage and drive closure.
• Debug simulation failures, perform waveform analysis, and work with designers/firmware to resolve root causes.
• Build and support end-to-end verification flows including RTL simulation, synthesis validation, and bitstream generation for eFPGA soft logic within SoCs.
• Contribute to verification methodology, automation, and continuous integration improvements.

Requirements

Must-have technical skills and practical experience for successful performance in this role.

• Strong understanding of SoC architectures and common bus protocols (AXI, AHB).
• Hands-on experience developing UVM-based verification environments and constrained-random verification.
• Proficiency in SystemVerilog, Verilog; experience with C/C++ and Python for testbenches and automation.
• Experience debugging RTL and firmware with simulation and waveform analysis tools.
• Experience developing automation solutions and working in distributed compute environments.
• Working knowledge of SystemC and Transaction-Level Modeling (TLM).
• Solid understanding of digital design fundamentals including computer architecture, timing, power, process variation, and reliability considerations.
• Strong communication and collaboration skills to work across multidisciplinary teams.
• Willingness to travel up to 10%.

Nice-to-have:

• Experience supporting silicon tape-outs in advanced nodes (N4, N5 or similar).
• Knowledge of Functional Safety (FuSA) and safety-focused verification practices.
• Experience with FPGA or programmable-logic architectures.
• Familiarity with CI-driven regression automation and verification productivity tools.

Education Requirements

Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent industry/practical experience.

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.