Staff Design Verification Engineer - CPU Core Verification (Vector)

Job Title

Staff Design Verification Engineer - CPU Core Verification (Vector)

Role Summary

Senior individual-contributor in the CPU Design Verification organization responsible for planning and executing verification for high-performance out-of-order CPU cores, with significant scope on RISC-V Vector Extension (RVV) and vector microarchitecture verification.

The role requires ownership of verification strategy from block-level through core integration, close collaboration with architecture/RTL/performance teams, and delivering signoff-quality verification results.

Experience Level

Senior - typically 7+ years relevant experience in ASIC/CPU/core or SoC design verification (posting also references 5–8 years in one section, but primary minimum is 7+ years).

Responsibilities

Primary responsibilities include defining and executing verification strategy, driving closure, and improving verification quality and infrastructure.

• Own verification planning and execution for one or more high-performance out-of-order CPU core areas through core-level integration and signoff.
• Drive test planning, stimulus generation, debug, coverage analysis, and closure for complex CPU features and microarchitectural interactions.
• Define verification approaches for branch prediction, instruction fetch, issue/dispatch, pipeline interactions, hazard handling, memory ordering, exceptions, hardware prefetch, and vector execution.
• Lead verification of RVV/vector-unit functionality: arithmetic, memory ops, masking, configuration-dependent execution, and scalar-vector interactions.
• Develop and maintain verification environments, checkers, assertions, scoreboards, stimulus, and coverage models targeting corner cases.
• Collaborate with architecture and design teams early to review specs, resolve ambiguity, and improve debugability and verification completeness.
• Perform failure analysis and root-cause debug across spec, RTL, test content, and verification infrastructure.
• Contribute reusable methodology, automation, and infrastructure across CPU core programs and mentor other engineers.

Requirements

Must-have technical skills and experience required for success in this role.

• 7+ years of relevant ASIC/CPU/core or SoC design verification experience with hands-on ownership of complex verification problems.
• Strong hands-on experience with SystemVerilog-based verification and modern verification methodologies.
• Direct experience with CPU/core verification and solid understanding of computer architecture and microarchitecture.
• Experience in one or more CPU core areas: Frontend, Midcore, Load-Store Unit, memory ordering/consistency, hardware prefetch, or Vector Unit verification.
• Proven verification flow skills: test planning, stimulus generation, failure analysis, coverage analysis, and coverage closure.
• Strong debug skills and ability to translate architectural intent into verification strategy.
• Familiarity with scripting/programming for DV infrastructure (Python, C/C++, or similar).

Nice-to-have

• Direct experience with high-performance out-of-order CPU core verification and RVV/SIMD/vector-processor verification.
• Experience verifying vector behaviors (masking, reductions, permutations, vector-scalar ops) and vector memory behavior (alignment, page-boundary, exceptions, cache interactions).
• Experience with formal verification, emulation, or acceleration for high-risk verification problems.
• Experience developing assertions, checkers, and scoreboards for ordering-sensitive CPU behavior and contributing reusable verification methodology or infrastructure.
• Experience collaborating with performance, compiler, system verification, or software teams to close verification gaps.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field (BS/MS in EE, CE, or CS referenced in the posting).

About the Company

Company: SiFive

Headquarters: San Mateo, California, United States

SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.