Staff Design Verification Engineer – Coherent Interconnect (CHI)

Job Title

Staff Design Verification Engineer – Coherent Interconnect (CHI)

Role Summary

Own and drive verification of a next-generation cache-coherent interconnect subsystem with primary focus on CHI protocol correctness, coherent data movement, ordering, snoop/home-node interactions, and subsystem integration across multiple interface boundaries.

This is a Staff-level individual contributor role responsible for defining verification strategy, identifying architectural and verification gaps early, solving difficult protocol and integration problems, and improving verification quality across the coherent interconnect effort.

Experience Level

Senior level. Typical guidance: 7+ years of ASIC or SoC design verification experience.

Responsibilities

Accountable for planning and executing verification for coherent interconnects and for improving verification methodology and productivity.

• Drive verification of CHI transactions across request, response, snoop, and data paths, covering concurrency, hazards, deadlock avoidance, and ordering corner cases.
• Develop and maintain verification environments, protocol checkers, scoreboards, assertions, stimulus, and coverage models for coherency, flow control, retries, and error handling.
• Verify integration across caches, home nodes, request nodes, snoop filters, bridges, and protocol-adaptation paths.
• Design high-value directed and constrained-random scenarios to expose coherency, buffering, arbitration, and system-level corner cases.
• Partner with architecture, design, formal, and software teams to clarify requirements and accelerate debug and signoff.
• Analyze failures, isolate root causes, and drive durable fixes across RTL, assertions, testbench, and test content.
• Improve methodology, infrastructure, and debug productivity for the coherent interconnect verification effort.
• Contribute to reviews of specifications, verification plans, coverage closure, and debug strategies; mentor other engineers.

Requirements

Must-have technical skills and experiences required for successful performance in this role.

• 7+ years of ASIC or SoC design verification experience focused on IP or subsystem verification.
• Strong hands-on experience with SystemVerilog-based verification, including assertions and scoreboards.
• Deep understanding of cache-coherent systems, memory subsystems, and on-chip interconnects.
• Direct experience verifying coherent protocols (strong preference for CHI).
• Solid knowledge of protocol behavior: ordering, snooping, flow control, buffering, arbitration, and error handling.
• Experience building reusable checkers, scoreboards, coverage models, and debug infrastructure.
• Strong debugging and root-cause analysis skills across specification, RTL, and verification layers.
• Proven ability to work effectively across architecture, design, and verification teams in a fast-moving environment.
• Must be able to pass background checks and any export-control authorization processes; authorization to work in the United States is required for this posting.

Nice-to-have:

• Experience with ARM CHI or similar high-performance coherent interconnect protocols.
• Experience verifying large subsystem integration involving coherent caches, bridges, or protocol-conversion paths.
• Experience with memory consistency, weak-ordering verification challenges, formal verification, emulation-assisted debug, or performance-oriented verification.
• Familiarity with Python or other scripting languages used for DV infrastructure and automation.
• Proven mentoring experience and a track record of driving team-wide verification quality improvements.

Education Requirements

Bachelor’s or Master’s degree (BS/MS) in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.

About the Company

Company: SiFive

Headquarters: San Mateo, California, United States

SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.