Staff Design Verification Engineer
QualcommJob Title
Staff Design Verification Engineer
Role Summary
Join Qualcomm's ASIC/SoC verification team responsible for pre-silicon validation of DDRSS IP across product tiers. The role focuses on developing and maintaining DV testbenches, executing validation plans, debugging regressions, and delivering robust verification collateral.
Experience Level
Senior-level. Position expects experienced engineers (staff level) with 8+ years of relevant ASIC design/verification work experience.
Responsibilities
The role combines hands-on verification work with cross-functional coordination to ensure IP quality and program success.
- Develop and maintain DDRSS DV testbenches and verification collateral (checkers, trackers, scoreboards, assertions, functional coverage).
- Plan and execute feature additions, mode re-enablement, and comprehensive test plans for IP variants.
- Run regressions, analyze failures, root-cause issues, and propose fixes.
- Create and deploy validation tools and infrastructure (examples: Certitude, VC Formal, Fishtail).
- Work with architects, RTL designers, firmware, and system teams to resolve issues and drive releases.
- Improve DV methodologies and test coverage; add debug hooks to accelerate failure analysis.
Requirements
Must-have technical skills and experience required for successful performance in this role.
- 8+ years of ASIC design/verification/validation/integration experience; staff-level experience preferred.
- Strong SystemVerilog and UVM expertise; experience with monitors, scoreboards, sequencers, and script-driven flows.
- Solid digital design fundamentals and strong debug skills; comfortable navigating large testbenches and build systems.
- Familiarity with bus protocols such as AHB, AXI, ACE, ACE-Lite.
- Understanding of multi-core ARMv8 CPU architecture, cache coherency protocols, and virtualization concepts.
- Good knowledge of DDR families and generations (LP/PC; DDR2/3/4/5) and ability to derive test plans from specifications and standards.
- Experience developing or using formal tools and validation frameworks; ability to develop automation to increase bug discovery rate.
- Post-silicon bring-up and HW-SW debug experience, and familiarity with silicon debug toolchains are beneficial (nice-to-have).
Education Requirements
Bachelor's, Master's, or PhD in Science, Engineering, Computer Science, Information Systems or a related field was listed as acceptable. Qualcomm's minimum qualification guidance in the posting specifies: Bachelor's +4 years, Master's +3 years, or PhD +2 years of relevant ASIC design/verification/validation/integration experience. Equivalent practical experience acceptable where indicated.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
