Job Title
Staff BIOS/Platform System Engineer
Role Summary
The Staff BIOS/Platform System Engineer leads BIOS/UEFI bring-up, validation, and low-level firmware debugging across platforms based on AMD, Intel, and ARM processors. The role focuses on DDR memory subsystems, hardware–firmware interfaces, cross-functional lab bring-up, and production readiness of platform firmware.
Experience Level
Senior — posting requires 3+ years of hands-on BIOS/UEFI firmware development or validation experience.
Responsibilities
Primary responsibilities include platform bring-up, validation, troubleshooting, and documentation.
- Lead BIOS/UEFI bring-up and validation for new hardware platforms, including CPU, chipset, and DDR memory subsystems.
- Develop and execute validation test plans for BIOS features, power management (ACPI/S-states), security features, and boot flows.
- Troubleshoot hardware–firmware interface issues: POST failures, memory training errors, PCIe enumeration, and power/thermal sequencing.
- Configure and validate DDR5 memory subsystems: SPD/XMP programming, memory training tuning, RAS features, and JEDEC compliance work.
- Customize and debug BIOS/UEFI firmware on AMD (AGESA/EPYC/Ryzen), Intel (FSP/Core/Xeon), and ARM platforms.
- Support manufacturing and sustaining engineering with BIOS customization, factory programming, and field issue resolution.
- Use industry-standard debug tools (JTAG/ITP, logic analyzers, oscilloscopes, serial consoles) for root-cause analysis.
- Author and maintain issue logs, validation reports, debug guides, and internal technical documentation.
- Participate in design reviews, bring-up planning, and cross-functional troubleshooting with systems and hardware teams.
Requirements
Must-have technical skills and practical experience required for the role.
- 3+ years of hands-on BIOS/UEFI firmware development or validation experience.
- Experience with at least two CPU architectures from: AMD (AGESA, EPYC/Ryzen), Intel (FSP, Core/Xeon), or ARM (TF-A, EDK2).
- Strong understanding of DDR5 memory architecture, training algorithms, SPD/MR registers, and RAS features.
- Proficiency in C/C++ and scripting languages (Python, Bash) for firmware development and automation.
- Experience with UEFI/EDK2 framework, SMM, DXE, PEI driver development, and ACPI/ASL.
- Familiarity with hardware debug tools: JTAG debuggers (e.g., Intel ITP, Lauterbach), protocol analyzers, oscilloscopes, and serial consoles.
- Solid understanding of platform busses and interfaces: PCIe, USB, I2C/SMBus, SPI, LPC, UART, and GPIO.
- Ability to read and interpret hardware schematics, datasheets, and silicon vendor documentation.
- Strong analytical, problem-solving, and written/verbal communication skills; experience authoring technical documentation.
Nice-to-have:
- Experience with AMD PSP, Intel ME/CSME, or ARM TrustZone security subsystems.
- Familiarity with BMC firmware (OpenBMC) and IPMI/Redfish management interfaces.
- Knowledge of server RAS features: DRAM ECC, memory mirroring, patrol scrub, and machine check architecture.
- Exposure to PCIe Gen5 or CXL validation and JEDEC DDR5 compliance testing.
- Understanding of power management frameworks (ACPI, AMD STAPM, Intel DPTF) and platform telemetry.
- Prior collaboration with silicon vendors on pre-silicon or early-silicon bring-up.
- Experience with version control (Git), CI/CD pipelines, and agile workflows.
Education Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a closely related field.
About the Company
Company: Monolithic Power Systems
Headquarters: San Jose, California, USA
Monolithic Power Systems, Inc. (MPS) is a leading provider of energy-efficient power solutions for various applications, including industrial, telecom, automotive, and consumer sectors. Known for their cutting-edge integrated power semiconductors, MPS emphasizes innovation, sustainability, and creativity, making them one of the fastest-growing companies in the semiconductor industry.

Date Posted: 2026-08-19