Staff ASIC Power Engineer, ML Accelerators
GoogleJob Title
Staff ASIC Power Engineer, ML Accelerators
Role Summary
Join an AI hardware team focused on power efficiency for Tensor Processing Units (TPUs). The role leads power architecture and design efforts to meet aggressive power and performance targets for large-scale ML accelerators.
Work spans power modeling, RTL low-power practices, cross-functional architecture, and leading an experienced power team to deliver production silicon.
Experience Level
Senior level — typically requires around 10+ years of relevant experience in chip or system design and architecture.
Responsibilities
The role owns power delivery across the design lifecycle and drives cross-team power solutions.
- Develop and maintain design power models; drive convergence to power targets.
- Investigate, specify, and deploy architectural and microarchitectural power optimizations.
- Define best practices and methodologies for low-power RTL implementation.
- Collaborate with software and system teams to design power management architectures that meet dynamic targets.
- Lead and manage an experienced power engineering team; own execution and delivery of complex technical projects end-to-end.
Requirements
Core technical and leadership requirements. Degrees and academic preferences are listed under Education Requirements.
Must-have:
- ~10 years of experience in design or architecture, including logic design, power architecture, performance engineering, or SoC design.
- Hands-on experience with power design, power modeling, and power-reduction methodologies.
- Proven technical leadership and project ownership with successful delivery of complex IC projects.
- Understanding of power and thermal management at silicon and system levels, including DVFS and turboing techniques.
- Ability to solve open-ended power and performance problems under ambiguity.
Nice-to-have:
- Experience defining and implementing chip-wide power management architectures and control schemes.
- Prior work on ML accelerator or high-performance SoC power architectures.
Education Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. Master's degree or PhD in EE/CE/CS with emphasis on computer architecture is preferred.
About the Company
Company: Google
Headquarters: Mountain View, CA, United States
Google is a global technology company that develops Internet services and products including search, advertising, cloud computing, AI, software, hardware, and custom silicon for consumer and enterprise applications.
