Staff Applications Engineer, Yield & Diagnosis
SynopsysJob Title
Staff Applications Engineer, Yield & Diagnosis
Role Summary
Work with customer validation, product engineering and fab teams to diagnose scan, chain and embedded memory failures and drive yield improvement using Synopsys diagnosis workflows and Yield Explorer.
This is a field-facing technical role within Applications/Field Engineering supporting post-silicon debug, root-cause analysis, and volume diagnosis for high-volume SoC customers.
Experience Level
Senior; requires 6+ years of hands-on experience in semiconductor diagnosis, DFT, yield engineering, product engineering, or silicon validation.
Responsibilities
Primary responsibilities include customer-facing diagnosis, escalations, and building scalable yield workflows.
- Drive customer engagements on scan diagnosis, chain diagnosis, and Memory BIST failure analysis using Yield Explorer and related workflows.
- Support post-silicon debug for high-volume manufacturing customers and perform root-cause analysis on scan, chain, and embedded memory failures.
- Interpret diagnosis reports, produce defect pareto analysis, and deliver actionable recommendations to improve yield and time-to-market.
- Manage technical escalations across customer DFT, product engineering, and yield teams, coordinating closure with Synopsys R&D, support, and field organizations.
- Collaborate with internal DFT architects, ATPG developers, and product teams to refine diagnosis methodologies and tool workflows.
- Design and deliver volume diagnosis workflows that scale across wafer-level test data for complex SoC ramps.
- Present technical findings and yield strategies to stakeholders ranging from bench engineers to executive leadership.
Requirements
Must-have technical skills and experience for success in the role.
- 6+ years of hands-on experience in semiconductor diagnosis, DFT, yield engineering, product engineering, or silicon validation.
- Deep expertise in scan diagnosis, chain diagnosis, and failure localization methodologies.
- Strong working knowledge of volume diagnosis for scan and Memory BIST, including defect pareto analysis and yield learning workflows.
- Hands-on experience with Synopsys Yield Explorer and diagnosis tool workflows.
- Solid understanding of DFT fundamentals including ATPG, scan compression, scan architecture, and Memory BIST.
- Experience debugging SRAM and embedded memory failures in post-silicon or high-volume manufacturing contexts. Nice-to-have.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering, Electronics, VLSI, or a related technical field.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
