Staff Applications Engineer - Timing Signoff & Power Integrity
SynopsysJob Title
Staff Applications Engineer - Timing Signoff & Power Integrity
Role Summary
Senior applications engineer on the Customer Success Group focused on Static Timing Analysis (PrimeTime) and ECO tools (PrimeClosure). The role partners with customer design teams to diagnose and resolve advanced timing and power-integrity issues, drive tool adoption, and feed customer requirements into R&D.
Work involves pre-sale evaluations, post-sale deployment, hands-on debugging of customer designs, training, and cross-functional collaboration with R&D, product marketing, and sales.
Experience Level
Senior-level role requiring substantial hands-on experience in chip design and STA; comfortable leading technical engagements with customers and influencing product direction.
Responsibilities
Primary responsibilities include technical customer engagement, methodology delivery, and product feedback.
- Drive adoption and integration of PrimeTime and PrimeClosure in customer flows (pre-sale and post-sale).
- Perform competitive benchmarks and document performance, accuracy, and capacity in real designs.
- Deliver hands-on training and workshops on timing closure, ECO flows, and advanced STA features.
- Troubleshoot complex timing issues: corners, process variation, crosstalk, and IR effects.
- Implement ECOs (gate sizing, buffer insertion, logic restructuring) and advise on closure strategies.
- Collaborate with R&D and product marketing to translate customer problems into feature requests and use cases.
- Present technical recommendations to engineering teams and management; build long-term technical relationships with key customers.
Requirements
Must-have technical skills and hands-on experience for effective performance in this role.
- Proven working knowledge of Static Timing Analysis (STA) and ECO closure methodologies.
- Direct experience closing timing on silicon designs at advanced nodes (16nm or below) with responsibility for timing closure or ECO implementation.
- Hands-on proficiency with Synopsys PrimeTime for STA, including running analysis, reading reports, and debugging violations.
- Understanding of timing corners and process variation methodologies (OCV/AOCV/POCV) and signal integrity impacts such as crosstalk and IR drop.
- Experience with ECO flows and tools (PTECO/PrimeClosure) and practical ECO techniques.
- Strong customer-facing skills: ability to diagnose issues from imperfect data, lead technical discussions, and transfer methodology to customer teams.
- Nice-to-have: familiarity with scripting (TCL or Python) to automate analysis and customize flows.
Education Requirements
BSEE with ~5+ years relevant experience, or MSEE with ~3+ years relevant experience, or equivalent practical experience in digital design, timing analysis, or applications engineering. (Job text explicitly allows degree-equivalent experience.)
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
