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Staff Applications Engineer - Timing & Signoff

Synopsys
September 16, 2026
Full-time
On-site
Austin, Texas, United States
$112,000 - $168,000 USD yearly
EDA Jobs, Level - Senior

Job Title

Staff Applications Engineer - Timing & Signoff

Role Summary

As a Staff Applications Engineer on the Timing & Signoff team in Austin, you will deploy and support Synopsys signoff tools for advanced-node SoC and 3DIC designs. You will work directly with customer design teams to diagnose and resolve static timing analysis, power integrity, signal integrity, and reliability signoff issues across chip, package, and system levels. The role includes collaboration with product and presales teams and customer-facing work that may require travel.

Experience Level

Senior-level (Staff). The posting lists roughly 3–5 years of hands-on semiconductor design experience; demonstrated signoff or applications engineering experience is required.

Responsibilities

Primary responsibilities include customer deployment, issue resolution, and collaboration with product and sales teams.

  • Deploy and support signoff tools (PrimeTime, RedHawk-SC, PrimeClosure, PTECO, Tweaker, StarRC) at customer sites.
  • Diagnose and resolve STA, PDN, SI, and reliability signoff challenges across chip, package, and system levels.
  • Own technical issues end-to-end for assigned accounts to unblock tapeouts and meet schedules.
  • Translate customer pain points into actionable product enhancements and roadmap priorities with product teams.
  • Support presales technical activities by demonstrating signoff solutions and articulating technical value.
  • Create and maintain deployment guides, best practices, and troubleshooting documentation.
  • Participate in cross-functional initiatives to improve tools, methodologies, and customer engagement.

Requirements

Must-have technical skills and experience; nice-to-have items noted.

  • 3–5 years of hands-on semiconductor design experience with expertise in static timing analysis, timing closure, ECO implementation, or power delivery network analysis at block or SoC level.
  • Proven applications engineering or technical support experience in timing signoff or power integrity domains with direct customer interaction and issue resolution.
  • Working proficiency with Synopsys signoff tools (PrimeTime, RedHawk-SC, PrimeClosure, PTECO, Tweaker, StarRC) in real design environments.
  • Strong scripting skills (Python, Tcl, Perl) to automate workflows, analyze results, and build custom solutions.
  • Effective communication and problem-triage skills for interacting with hands-on engineers and engineering leadership.
  • Willingness to travel to customer sites as needed.
  • Nice to have: experience with PDN implementation flows, advanced-node design challenges, or 3DIC methodologies.

Education Requirements

Not specified.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-08-30