Staff Analog Design Engineer

Job Title

Staff Analog Design Engineer

Role Summary

Lead development of complex analog and mixed-signal IP macro-blocks for high-performance power management ICs. Work in the Munich design team to deliver compact, high-efficiency power-management solutions in advanced CMOS and FinFET nodes.

Provide technical leadership on architecture, implementation, verification and silicon bring-up; mentor junior engineers and collaborate with cross-functional teams.

Experience Level

Senior. Ideal candidates have 10+ years in analog IC design, or 5+ years focused on Power IC / DC–DC design and PMIC development.

Responsibilities

Primary responsibilities include hands-on design, verification, and integration of analog/mixed-signal IP macro-blocks used in power management ICs.

• Drive technical feasibility studies and architectural trade-offs for power-stages, gate drivers, control and telemetry subsystems.
• Perform full custom design of analogue/mixed-signal blocks: specification, behavioural modelling, pre- and post-layout verification, and layout implementation.
• Run layout parasitic extraction and back-annotated simulations; optimise layouts for matching, routing, parasitics, electromigration and DFM.
• Review and provide guidance on floorplan and layout quality across IP blocks.
• Coordinate IP integration into top-level ICs and interface with passive, package, digital and verification teams.
• Support or own silicon lab validation, product characterisation and qualification activities.
• Mentor junior engineers and coordinate tasks with internal and external contributors.

Requirements

Must-have technical skills and experience for successful performance in this role.

• 10+ years analogue/mixed-signal IC design experience, or 5+ years focused on Power IC / DC–DC design and PMICs.
• Expert proficiency with Cadence Virtuoso and circuit simulation flows.
• Strong analog/mixed-signal design and layout knowledge: CMOS and FinFET processes, matching, offset, noise, efficiency, current density, ESD and reliability considerations.
• Hands-on experience with parasitic extraction, post-layout simulation and parasitic-driven optimisation.
• Proven ability to produce spec-compliant designs, documentation and verification matrices; experience with behavioural modelling and block/top-level verification.
• Ability to collaborate across sites and functions and to present complex technical topics clearly.
• Willingness to travel approximately 10% for collaboration and validation activities.
• Nice-to-have: prior experience in lab silicon validation of PMIC/Power IC IP.

Education Requirements

MS in Electrical Engineering (stated requirement). The posting specifies MS in EE along with the experience ranges for power IC or analogue/mixed-signal roles.

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.