STA Engineer

Job Title

STA Engineer

Role Summary

Senior Static Timing Analysis (STA) engineer on an ASIC/VLSI engagement. Responsible for timing closure, timing constraint development, equivalence checking, and functional ECOs while collaborating with RTL, synthesis and signoff teams.

This is a contractor role for an initial 12+ month engagement, onsite in Sunnyvale, CA.

Experience Level

Senior - 10+ years of relevant STA/physical design experience.

Responsibilities

Primary responsibilities include:

• Perform static timing analysis and drive timing closure across blocks and top-level.
• Debug synthesis warnings/errors and collaborate with RTL designers to resolve issues.
• Execute scan insertion flows and validate scan chains.
• Perform functional ECOs (using Conformal) and edit netlists for minimal-impact changes when required.
• Run logical equivalence checking (Formality/Conformal) and investigate mismatches.
• Author, review, and validate timing constraints; provide timing-driven feedback to RTL teams.
• Prepare timing signoff reports and support signoff activities with PrimeTime.

Requirements

Must-have skills and tools:

• 10+ years of STA/physical design experience on ASIC projects.
• Working knowledge of RTL and synthesis flows with ability to debug synthesis issues.
• Experience with scan insertion and functional ECO methodologies.
• Proven experience with logical equivalence checking and debugging (Synopsys Formality, Cadence Conformal).
• Experience with timing signoff and analysis tools (Synopsys PrimeTime, Synopsys DC).
• Ability to write and validate timing constraints and communicate actionable feedback to RTL designers.
• Availability for a 12+ month contract and able to work onsite in Sunnyvale, CA.

Nice-to-have:

• Experience on advanced-node flows or complex SoC designs.

Education Requirements

Not specified.

About the Company

Company: Insilico

Headquarters: Irvine, CA, USA

Insilico provides specialized VLSI, embedded design, and software services focused on compute and connectivity. Founded by industry veterans, it offers end-to-end ASIC and CPU/GPU design services (spec-to-silicon), timing and verification support, and serves clients across communications, networking, automotive, biomedical, consumer electronics and IoT. Headquartered in the U.S. with operations in India and APAC.