SrvDigital Design Engineer

Job Title

SrvDigital Design Engineer

Role Summary

Senior digital design engineer responsible for RTL development and front-end implementation of complex DRAM digital and mixed-signal blocks. The role spans RTL design, synthesis, timing analysis, power optimization, and driving design quality through the RTL-to-GDS flow.

Works closely with architecture, verification, and physical design teams to meet product PPA (Power, Performance, Area) objectives for next-generation memory products.

Experience Level

Senior-level. The posting describes a senior role; expect mid-to-senior engineers with substantial ASIC/RTL experience (typical background: multiple years of relevant industry experience).

Responsibilities

Core responsibilities include implementation tasks and cross-team collaboration to meet performance, power, and quality targets.

• Design, develop, and deliver RTL for complex DRAM digital and mixed-signal blocks in line with product specifications.
• Perform front-end quality checks: linting, CDC/RDC analysis, logic synthesis, and static timing analysis.
• Create, maintain, and refine synthesis and timing constraints (SDC); analyze timing reports and drive timing closure across modes.
• Optimize power, performance, and area (PPA) through architecture and implementation trade-offs.
• Improve RTL-to-GDS flows, design methodologies, and automation to increase development efficiency and quality.
• Collaborate with architecture, verification, and physical design teams to resolve integration and implementation issues.

Requirements

Required technical skills and experience for the role.

Must-have:

• Proven experience developing RTL for complex digital designs from specification through implementation handoff.
• Strong knowledge of ASIC front-end flows including RTL design, functional verification, logic synthesis, CDC/RDC analysis, and static timing analysis (STA).
• Experience developing and maintaining SDC constraints: clocks, timing exceptions, I/O constraints, and multi-mode multi-corner timing.
• Proficiency with Verilog/SystemVerilog and industry-standard simulation tools.
• Experience with low-power design methodologies, UPF-based power intent, and PPA optimization.

Nice-to-have:

• Experience developing RTL for memory products or other high-performance digital designs.
• Familiarity with CMOS digital and mixed-signal circuit concepts.
• Proven ability to improve productivity via process improvements, automation, and enhanced methodologies.
• Strong communication and teamwork skills; experience using AI-assisted tools to improve engineering efficiency is a plus.

Education Requirements

Master's degree in Electrical Engineering (or equivalent) with 4+ years of relevant experience, or Bachelor's degree in Electrical Engineering with 5+ years of relevant experience; equivalent practical experience accepted as stated in the posting. No specific certifications were listed.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.