Sr. Tech Lead SRAM ROM Expert

Job Title

Senior Tech Lead - SRAM & ROM Expert

Role Summary

Lead architecture and technology strategy for SRAM and ROM products across embedded and standalone memory lines. Drive roadmap, PPA (performance, power, area), reliability, yield and silicon validation from concept through production while providing technical leadership to cross-functional teams.

Experience Level

Senior-level. The role expects 10+ years of experience in SRAM/ROM or related memory design and development.

Responsibilities

Key duties include setting memory architecture direction, collaborating across design and process teams, and delivering production-quality silicon and IP.

• Define and drive next-generation SRAM and ROM architectures for embedded and standalone memory products.
• Own memory roadmap development, architectural trade-off analysis, and technology strategy across product lines.
• Lead optimization of performance, power, area (PPA), yield, and reliability targets.
• Architect memory arrays, peripheral circuits, redundancy schemes, ECC, power-management features, and test methodologies.
• Collaborate with circuit design, layout, verification, product, and process teams from concept through silicon validation and production.
• Develop models for memory performance, power, area, and yield prediction; lead root-cause analysis of silicon issues and define architectural improvements.
• Mentor engineers and provide technical leadership across cross-functional teams; influence long-term memory IP strategy.
• Architect SRAM/ROM-based In-Memory Computing (IMC) solutions for AI/ML and edge applications; evaluate digital, analog, and mixed-signal IMC architectures and optimize energy, throughput and accuracy for memory-centric workloads.

Requirements

Must-have technical skills and proven delivery record.

• Extensive experience in SRAM, ROM, embedded memory, custom memory, or memory compiler development.
• Deep expertise in memory architecture, bitcell and peripheral circuit design, redundancy schemes, and ECC.
• Strong knowledge of memory compilers, advanced CMOS technologies, characterization, silicon validation, reliability, and yield optimization.
• Proven technical leadership with a track record of innovation, patent generation, and successful silicon delivery.
• Experience collaborating with system, algorithm, and AI-accelerator teams to enable memory-centric computing (IMC experience highly desirable).
• Ability to develop architectural models for PPA and yield prediction and lead root-cause analysis.

Education Requirements

Bachelor’s degree (B.E./B.Tech.) in Electrical Engineering, Electronics Engineering, Electronics & Communication, or a closely related discipline is required. Master’s degree (M.Tech./M.S.) in VLSI Design, Microelectronics, Semiconductor Technology, Integrated Circuit Design or related specialization is preferred. Ph.D. in VLSI, Memory Design, Computer Engineering or a related field is a plus.

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.