Sr. Staff Verification Engineer

Job Title

Sr. Staff Verification Engineer

Role Summary

Lead verification of complex mixed-signal power-management ICs (PMICs) within the Consumer & Industrial Power (CIP) organization. Define verification strategy, drive methodology and infrastructure, and ensure delivery quality for system-level power solutions.

This is a technical leadership role that partners with analog, digital, firmware and system teams to close coverage, debug mixed-signal interactions, and mentor global verification engineers.

Experience Level

Senior; guidance: 10+ years of experience in digital or mixed-signal verification.

Responsibilities

Accountable for planning, implementing and executing verification for PMICs and power subsystems.

• Define and drive verification strategy and methodology for PMIC and power subsystems.
• Develop and own verification plans, environments, and infrastructure.
• Lead UVM-based verification and AMS/mixed-signal flows; implement Real Number Modeling (RNM).
• Create self-checking testbenches, constrained-random tests, and reusable VIP.
• Drive coverage closure (functional, code, assertion) and improve verification efficiency.
• Verify system-level behaviors including power sequencing, fault handling and telemetry.
• Debug complex mixed-signal issues and perform root-cause analysis with cross-functional teams.
• Build regression infrastructure and automation frameworks to support large-scale verification.
• Provide technical leadership, guidance and mentorship across global teams.

Requirements

Core technical skills and practical experience required for the role.

• 10+ years of experience in digital or mixed-signal verification, with leadership responsibility on large projects.
• Strong experience with SystemVerilog, Verilog and UVM.
• Experience in AMS/mixed-signal verification and Real Number Modeling (RNM).
• Understanding of analog/digital circuits and power electronics specific to PMICs and power subsystems.
• Experience with verification planning, coverage analysis and debug methodologies.
• Scripting skills for automation and infrastructure (Python or Perl).
• Proven debugging and analytical skills with a system-level perspective.

Nice-to-have:

• Experience with PMIC components (DC-DC converters, LDOs, battery management systems).
• Familiarity with Cadence tools (Virtuoso, AMS simulation) and system-level power validation.
• Experience building reusable verification frameworks and prior technical leadership or mentoring roles.

Education Requirements

BS, MS or PhD in Electrical Engineering, Computer Engineering, or a closely related technical field.

About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.