Sr. Staff SoC RTL Engineer

Job Title

Sr. Staff SoC RTL Engineer

Role Summary

Hands-on individual contributor responsible for architecting and implementing digital SoC modules and subsystems for Ambiq’s ultra-low-power MCUs and SoCs. The role covers microarchitecture, RTL development, integration, and full silicon lifecycle through tapeout and bring-up.

This position sits on the SoC/RTL engineering team at Ambiq’s Austin headquarters and requires close collaboration with verification, physical design, and system teams.

Experience Level

Senior — requires significant prior experience. The role specifies 8+ years of hands-on ASIC or SoC RTL design experience.

Responsibilities

Primary responsibilities include architecture, RTL development, integration, and support for implementation and silicon bring-up.

• Define microarchitecture for SoC modules and subsystems.
• Develop production-quality RTL in Verilog/SystemVerilog.
• Own complex blocks from specification through pre-tapeout signoff.
• Integrate internal and third-party IP into MCU/SoC platforms.
• Work with ARM-based CPU subsystems and AMBA interconnects (AHB, APB, AXI).
• Partner with verification engineers on test planning, debug, and coverage closure.
• Collaborate with Physical Design to resolve timing, power, area, and implementation issues.
• Run, analyze, and resolve LINT, CDC, and RDC issues.
• Support FPGA prototyping, tapeout activities, silicon bring-up, and post-silicon debug.
• Contribute to low-power design through clock gating, power management, and efficient data movement.
• Mentor junior engineers and inform technical decisions across teams.

Requirements

Must-have technical skills, experience, and constraints for candidates.

• 8+ years of hands-on ASIC or SoC RTL design experience.
• Strong Verilog and/or SystemVerilog development skills.
• Proven ownership of complex digital blocks, IPs, or subsystems.
• Experience creating or contributing to architecture and microarchitecture specifications.
• Understanding of front-end ASIC development: synthesis, timing closure, LINT, CDC, RDC.
• Experience working with verification and Physical Design teams through design closure.
• Familiarity with ARM-based SoCs, CPU subsystems, and AMBA protocols (AHB, APB, AXI).
• Experience supporting tapeout, silicon bring-up, and post-silicon debug.
• Clear technical communication and ability to explain tradeoffs and risks.
• Strong problem-solving skills and willingness to remain hands-on.
• Must be located in Austin and able to work onsite five days per week; candidates must be authorized to work in the United States.

Nice-to-have:

• ARM Cortex-M or embedded CPU subsystem experience.
• MCU architecture and peripheral integration, DMA, interrupt controllers, bus arbitration.
• Low-power SoC design (UPF, power gating, retention, multi-voltage domains).
• Memory controllers, DSPs, hardware accelerators, security blocks, or AI-related IP.
• FPGA prototyping/emulation, third-party IP evaluation, and multiple production tapeouts.

Education Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field (as stated in the posting).

About the Company

Company: Ambiq

Headquarters: Austin, TX, United States

Semiconductor company developing ultra-low-power microcontroller units (MCUs) and system-on-chip (SoC) platforms for battery-powered and edge devices, focusing on low-power IP, RTL, and production silicon solutions.