Sr. Staff Manager, Product Engineering

Job Title

Sr. Staff Manager, Product Engineering

Role Summary

As Sr. Staff Manager, Product Engineering in Marvell’s AI Connectivity Group you will lead product engineers responsible for productization and NPI of high-speed datacenter connectivity solutions (PAM4 and Coherent DSP). You will manage multiple concurrent programs from silicon bring-up through mass production and build a distributed, high-performing team.

Expected base pay range (USD): 143,560 - 215,000 per year. This role is eligible for bonus and equity awards. Applicants may be subject to export-license review; non-U.S. citizens may require export approval prior to employment.

Experience Level

Senior-level; typically requires 10+ years in the semiconductor industry and 3+ years of people management experience.

Responsibilities

Lead NPI, yield, quality, and cross-functional execution to deliver production-ready high-speed connectivity products.

• Lead, mentor, and grow a global product engineering team; recruit, develop, and manage performance.
• Oversee multiple concurrent NPI programs including silicon bring-up, DFT validation, and test methodology development.
• Provide technical direction and hands-on guidance for engineering samples and customer validation.
• Drive yield characterization, root cause analysis, and correlation across bench, wafer sort, and final test.
• Improve test infrastructure and data analytics; apply GR&R, Cp/Cpk, and statistical methods to ensure product quality.
• Coordinate with operations and supply chain to scale production capacity and qualify alternate sources.
• Lead cross-functional reviews, resolve technical/operational issues, and communicate strategic priorities to stakeholders.
• Manage program metrics, schedules, and financial accountability for team deliverables.

Requirements

Must-have technical skills, relevant experience, and leadership attributes.

• 10+ years semiconductor experience with product engineering, device physics, and end-to-end NPI workflow.
• 3+ years managing engineering teams in a global matrix organization.
• Deep expertise in high-speed connectivity technologies (PAM4 DSP, Coherent DSP) with hands-on silicon bring-up, yield optimization, and test strategy.
• Experience with advanced technology nodes (10 nm and below) preferred.
• Proficiency with ATE concepts (e.g., Advantest 93K, UltraFlex), test handlers, and wafer probers.
• Familiarity with high-speed optical/electrical interface standards (200G/400G/800G PAM4, 100G/400G Coherent).
• Strong skills in yield analysis, quality management tools, and statistical data analysis.
• Excellent communication, stakeholder management, decision-making, and ability to manage competing priorities.

Education Requirements

M.S. or Ph.D. in Electrical/Electronics Engineering or a related field.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.