Sr. Staff Engineer PD

Job Title

Sr. Staff Engineer, Physical Design

Role Summary

The Physical Design Engineer delivers hands-on expertise across RTL-to-GDSII flows to implement customer-specific ICs. The role focuses on synthesis, place-and-route, timing/power closure, DFT implementation, physical verification, and automation to enable clean, on-time tape-outs.

Benefits information: Company benefits page.

Experience Level

Senior-level. The posting specifies 4+ years of hands-on physical design experience on SoCs (RTL-to-GDSII).

Responsibilities

Core responsibilities include:

• Implement DFT architectures (ATPG, MBIST, LBIST, scan insertion) and analog test features.
• Execute full physical design flow: synthesis, floorplanning, placement, CTS, P&R, timing closure, power/noise analysis, and signoff verification.
• Develop design strategies to meet performance, area, and power targets for customer ICs.
• Apply IP reuse methodologies and standard flows to accelerate delivery.
• Identify and resolve timing, congestion, and power issues in high-speed, high-density designs.
• Perform physical verification (DRC, LVS) and support tape-out debug.
• Automate flows and tooling with TCL, Python, or Perl to improve productivity and repeatability.
• Collaborate with RTL, verification, DFT, and package teams to ensure design convergence.
• Analyze design metrics and propose process improvements driven by data.
• Follow Environmental, Health, Safety & Security requirements in daily work.

Requirements

Must-have technical skills and experience:

• 4+ years of hands-on physical design experience on SoC projects covering RTL-to-GDSII flows.
• Proficiency with EDA tools such as Synopsys ICC2/Fusion Compiler, Cadence Innovus/Genus, and Mentor Calibre for synthesis, PNR, STA, and verification.
• Strong static timing analysis experience (PrimeTime/Tempus), power analysis, and congestion mitigation techniques.
• Experience implementing DFT (ATPG, MBIST, LBIST, scan insertion) and test-related flows.
• Scripting skills for automation and debugging (TCL, Python, Perl).
• Familiarity with advanced nodes, multi-corner multi-mode (MCMM) analysis, and IP integration.
• Analytical problem-solving and effective cross-team communication skills.

Nice-to-have:

• Experience with automotive, high-performance computing, or AI-focused silicon.
• Proactive adoption of new tools, flows, and re-use best practices.
• Detail-oriented approach and commitment to on-time delivery.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.

About the Company

Company: GlobalFoundries

Headquarters: Saratoga Springs, New York, USA

GlobalFoundries is a leading contract manufacturer for the global semiconductor industry, with facilities in multiple countries, including the USA. The company develops a broad portfolio of semiconductor technologies and employs around 13,000 people worldwide. GlobalFoundries focuses on enhancing competitiveness in specialized application solutions and fostering innovation in mobile communications, consumer electronics, and automotive applications.