Sr Staff Engineer EM/IR

Job Title

Sr Staff Engineer EM/IR

Role Summary

Senior technical role responsible for EM/IR (electromigration and IR drop) sign-off, power-integrity analysis, and flow development for advanced-node SoCs. The engineer will own full-chip and block-level sign-off, develop and maintain signoff methodologies, and coordinate cross-functional fixes across physical design, package/interposer, DFT and test teams.

Experience Level

Senior — the posting specifies 12+ years of relevant semiconductor industry experience. (Minimum-qualifications also reference shorter experience thresholds tied to degree level.)

Responsibilities

Core responsibilities include technical ownership of power-integrity signoff, flow development, and cross-functional coordination.

• Own full-chip and block-level static/dynamic IR-drop and EM sign-off, including vector-based and vector-less signoff modes.
• Perform die + interposer and die + interposer + package analysis and provide sign-off metrics.
• Drive root-cause debugging for voltage and EM violations; define fixes with PnR and floorplanning teams.
• Provide power estimation and signoff using tools like PrimeTime-Power/Joules for multiple use cases.
• Define and maintain robust EM/IR signoff methodologies using EDA tools (e.g., Ansys RedHawk-SC, Cadence Voltus).
• Enhance flows and methods for faster convergence and to address changing signoff trends.
• Support chip-package-system (CPS) integration and collaborate with silicon/package/interposer teams.
• Coordinate with DFT, STA, analog/SerDes, and test teams to evaluate impacts and provide guidelines for test modes and power activity.
• Engage with EDA vendors on tool issues and track long-term flow improvements.
• Provide team leadership: allocate tasks, monitor schedules to meet tapeout milestones, mentor junior engineers, and report risks and progress to management.

Requirements

Essential technical skills and experience required for the role; listed as must-have vs. nice-to-have.

• Must-have: 12+ years of relevant semiconductor industry experience with demonstrated power-integrity sign-off expertise.
• Must-have: Advanced proficiency with EM/IR EDA tools such as Ansys RedHawk-SC, Cadence Voltus, and PTPX.
• Must-have: Strong scripting skills (Python, TCL) for flow automation and analysis.
• Must-have: Deep knowledge of EM/IR domain and working interaction with STA and physical-design teams.
• Must-have: Experience debugging EM/IR issues and driving fixes across PnR, DFT, package, and test teams.
• Nice-to-have: Experience with PrimeTime-Power/Joules workflows, CPM generation, and interposer/package-level analysis.
• Nice-to-have: Proven track record working with EDA vendors and integrating long-term flow improvements into production flows.

Education Requirements

Posting specifies degree-based minimums: Bachelor's, Master’s, or PhD in Computer Science, Electrical/Electronics Engineering, VLSI, or a related engineering/electronics discipline, with experience thresholds that vary by degree (e.g., Bachelor’s +6 years, Master’s +5 years, PhD +4 years). The listing also allows equivalent related-field experience.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.