Sr. Staff Engineer - Digital Design Verification

Job Title

Sr. Staff Engineer - Digital Design Verification

Role Summary

Senior verification engineer responsible for end-to-end digital verification of complex SoCs (multiple CPUs, DSPs, security blocks, interconnects, and peripherals) used in low-power edge, IoT, and edge-AI applications. The role owns verification strategy, plans, implementation, and closure across block, subsystem, and full-chip levels.

Ambiq Micro develops ultra-low-power semiconductor solutions; the role will work within cross-functional SoC teams in Austin and collaborate with architecture, design, and software engineers to deliver production-quality silicon.

Experience Level

Senior — typically 8–12 years of hands-on digital design verification experience.

Responsibilities

Execute and lead verification activities across block, sub-system, and full-chip scopes; define verification plans and deliverables; and drive debugging, coverage closure, and automation.

• Own and execute end-to-end digital verification at block, subsystem, and full-chip (SoC) levels.
• Develop detailed verification plans aligned with architecture and design specifications.
• Perform SoC-level verification using full-chip simulation and regression environments.
• Architect and implement scalable, reusable UVM-based SystemVerilog testbenches.
• Create test scenarios, stimulus, monitors, and checkers to achieve functional and code coverage targets.
• Drive constrained-random and directed testing, including scoreboarding and self-checking mechanisms.
• Develop and maintain C/C++ based verification libraries and tests for SoC-level validation.
• Automate verification flows for regressions, coverage collection, and results reporting.
• Define, track, and close functional and code coverage goals; perform root-cause analysis and verification-driven debug.
• Collaborate with design teams to isolate issues and drive fixes to meet project and schedule requirements.

Requirements

Required skills and experience for the role; preferred items noted separately.

• Experience: 8–12 years of hands-on digital design verification experience; multiple tape-outs with silicon functioning to spec.
• Verification expertise: SystemVerilog, UVM, Verilog; functional and code coverage methodologies; constrained-random testing and scoreboarding.
• SoC-level skills: Block-, subsystem-, and full-chip verification experience; C/C++ based verification for SoC validation (required).
• Protocols & architectures: AMBA protocols (AXI, AHB, APB); DMA, flow control, standard serial interfaces; processor-based systems (ARM and/or RISC‑V preferred).
• Automation & scripting: Python, Perl, Makefile for flow automation and regression infrastructure.
• Collaboration & communication: Ability to define verification deliverables, report status, and work closely with architecture, design, and software teams.
• Authorization: Must be currently authorized to work in the United States for any employer.

Nice-to-have:

• Experience verifying low-power digital architectures and features.
• Familiarity with security IPs (crypto, OTP), DSP or compute-heavy subsystems, and edge AI/ML workload enablement.

Education Requirements

Bachelor of Science in Electrical Engineering (BSEE) or Master of Science in Electrical Engineering (MSEE) required.

About the Company

Company: Ambiq

Headquarters: Austin, TX, United States

Semiconductor company developing ultra-low-power microcontroller units (MCUs) and system-on-chip (SoC) platforms for battery-powered and edge devices, focusing on low-power IP, RTL, and production silicon solutions.