Sr. Staff Digital Engineer

Job Title

Sr. Staff Digital Engineer

Role Summary

Lead design and verification of complex low-power digital circuits for mixed-signal integrated products. Deliver RTL implementations, verification environments, synthesis/implementation guidance and silicon bring-up support while coordinating with system, analog, firmware and test teams.

Expect to drive architecture and implementation decisions, own technical documentation and reviews, and support FPGA prototyping and lab characterization.

Experience Level

Senior — 10+ years of industry experience in digital integrated circuit design.

Responsibilities

Primary responsibilities cover end-to-end digital design, verification, implementation and post-silicon validation.

• Define, develop and optimize RTL for digital functions and sub/systems using SystemVerilog, Verilog or VHDL.
• Create digital specifications in collaboration with system architects and maintain technical documentation; lead design reviews.
• Implement design-for-test features (scan chains, BIST, boundary scan) and generate test vectors and DFT insertion flows.
• Define constraints, perform logic synthesis and supervise physical implementation to achieve timing closure; perform static timing analysis.
• Develop and execute verification plans, build UVM/OVM-based testbenches, run RTL and gate-level simulations; support formal verification where applicable.
• Plan and execute FPGA prototyping and pre-silicon emulation for hardware validation.
• Support silicon lab evaluation, performance characterization and debug; provide technical support to test, product and application engineering teams.
• Interface with cross-functional teams including embedded firmware, analog and system engineering to resolve system-level trade-offs.

Requirements

Key technical skills and experience required; items marked "Nice-to-have" are preferred but not mandatory.

• Extensive experience in digital IC development including frontend-to-backend flow, datapath and signal-processing blocks.
• Proven skills in timing analysis, constraints development, synthesis and timing closure using commercial EDA tools (Synopsys, Cadence, Siemens).
• Proficiency in SystemVerilog, Verilog and/or VHDL and in verification methodologies (UVM/OVM); familiarity with formal verification techniques.
• Experience with MCU-based hardware systems (ARM, RISC-V, PIC, STM32), memories, micro-architecture and peripheral interfaces.
• Hands-on experience with FPGAs, development boards, logic analyzers, oscilloscopes and common lab measurement techniques.
• Proficiency with scripting languages used in flows and automation (Python, Perl, Tcl).
• Familiarity with common hardware protocols (I2C, I3C, SPI, MIPI).
• Strong analytical, problem-solving, communication skills and demonstrated technical leadership.
• Nice-to-have: experience with Matlab and system design tools; experience in consumer or ITA market circuit development.

Education Requirements

B.S. or M.S. in Electrical Engineering or Computer Engineering.

About the Company

Company: Semtech

Headquarters: Camarillo, California, USA

Semtech Corporation is a high-performance semiconductor company providing IoT systems and Cloud connectivity solutions. The company focuses on delivering innovative technology solutions that support a smarter, more connected, and sustainable planet, with a dedication to quality across infrastructure, industrial, and consumer markets.