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Sr. Staff Digital Design Engineer - Memory Interface IP (HBM/DDR/LPDDR)

Synopsys
September 16, 2026
Full-time
On-site
Hyderabad, Telangana, India
ASIC Design Jobs, Level - Senior

Job Title

Sr. Staff Digital Design Engineer - Memory Interface IP (HBM/DDR/LPDDR)

Role Summary

Senior digital design engineer responsible for architecting and implementing high-speed memory interface IP (HBM, DDR, LPDDR) for ASIC products. The role works within the ASIC Digital Design / Memory Interface IP team in Hyderabad to deliver RTL, ensure timing and signal integrity, and support bring-up.

Experience Level

Senior-level. The job title indicates a senior/lead role; the posting does not specify years of experience.

Responsibilities

Core responsibilities include designing, verifying, and delivering memory interface IP and collaborating across design, verification, and layout teams.

  • Architect and implement RTL for memory controller/PHY interfaces (HBM, DDR, LPDDR).
  • Develop and review design specifications, micro-architecture, and interfaces.
  • Perform synthesis-friendly RTL coding and participate in timing closure and static timing analysis.
  • Support verification activities and root-cause functional/timing issues; collaborate with verification engineers on testbenches and coverage.
  • Work with physical design and signal integrity teams during floorplanning, routing, and signoff.
  • Mentor junior engineers and contribute to design reviews and documentation.

Requirements

Must-have skills and experience expected for the role; preferred items listed where applicable.

  • Must-have: Proven experience in digital ASIC design for high-speed memory interfaces (HBM/DDR/LPDDR).
  • Must-have: Strong RTL design skills in SystemVerilog/Verilog and experience with synthesis flows.
  • Must-have: Experience with static timing analysis, timing closure methodologies, and clocking strategies.
  • Must-have: Practical experience debugging silicon bring-up issues and collaborating with PHY/analog teams.
  • Nice-to-have: Familiarity with UVM-based verification, FPGA prototyping, or experience with industry EDA tools for simulation/synthesis.
  • Nice-to-have: Scripting skills (Python, Tcl, Perl) for automation and flow integration.

Education Requirements

Not specified.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-09-13