Sr Staff Applications Engineer, Simulation & Debug
SynopsysJob Title
Sr Staff Applications Engineer, Simulation & Debug
Role Summary
Work with customers to deploy Synopsys VCS and Verdi simulation and debug platforms, drive complex verification solutions, and influence product direction through field feedback. The role is customer-facing and collaborates closely with R&D, product validation, and global field teams.
Expect to lead benchmarks, reproduce field issues, and deliver production-ready integrations into customers' verification and gate-level flows.
Experience Level
Senior-level (typically 5–12 years of relevant verification or applications engineering experience).
Responsibilities
Primary responsibilities include customer deployments, technical diagnosis, and cross-team collaboration.
- Deploy VCS and Verdi into customer flows and integrate tools with existing testbenches and gate-level flows.
- Diagnose complex issues across UVM testbenches, gate-level simulation, low-power (UPF) flows, and timing-aware verification environments.
- Lead competitive benchmarking to demonstrate performance, capacity, and debug advantages.
- Reproduce field issues, gather customer requirements, and feed actionable feedback to R&D and product teams.
- Develop and optimize automation scripts (Perl, Python, TCL, Shell, Make) to improve verification workflows.
- Support technical escalations with root-cause analysis and remediation plans.
- Collaborate with global teams (product validation, field applications, customer engineering) to propose solutions and document best practices.
Requirements
Must-have skills and technologies are listed below. Nice-to-have items are indicated.
- Deep expertise in simulation, UVM, and SystemVerilog Assertions (SVA), with practical verification methodology experience.
- Strong HDL skills: Verilog, VHDL, and SystemVerilog; solid digital design fundamentals.
- Hands-on experience with gate-level simulation, timing-aware verification, and low-power verification using UPF.
- Advanced scripting skills in Perl, Python, TCL, Shell, and Make; comfortable working in UNIX/Linux environments.
- Proven experience running and interpreting benchmarks and leading customer technical engagements.
- Nice-to-have: experience with Synopsys Verdi or similar waveform debug tools; familiarity with DPI, C/C++, SystemC, or functional safety standards.
- Nice-to-have: exposure to generative AI technologies or AI-driven EDA workflows.
Education Requirements
Bachelor's or Master's degree in Electronics Engineering is specified; equivalent practical experience is accepted.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
