Sr. Staff AI System Software Engineer

Job Title

Sr. Staff AI System Software Engineer

Role Summary

Design and implement system software that connects RISC-V CPUs, AI accelerators, memory subsystems, and high-speed interconnects. Work across kernel, runtime, firmware, compiler, and hardware teams to enable efficient host-to-accelerator communication and heterogeneous memory management on RISC-V platforms.

Experience Level

Senior — typically 8+ years developing operating-system components, device drivers, or architecture-level system software for multiprocessor or heterogeneous systems.

Responsibilities

Deliver system software across the Linux stack and collaborate with architecture and hardware teams. Key responsibilities include:

• Design and implement Linux kernel components, device drivers, DMA engines, and memory-management subsystems for RISC-V accelerator platforms.
• Develop and optimize low-level device-side runtimes to maximize accelerator throughput and hide latency.
• Implement heterogeneous memory features such as memory migration, page-fault handling, and HMM-related mechanisms.
• Develop and optimize host-to-accelerator interfaces: PCIe, CXL, IOMMU, ATS, PRI, PASID, and related communication mechanisms.
• Integrate accelerator runtimes with machine-learning stacks (e.g., PyTorch, TVM, MLIR) in collaboration with framework teams.
• Analyze and optimize system performance including memory bandwidth, data-transfer overhead, address-translation latency, cache coherency, synchronization, and accelerator utilization.
• Build benchmarks, profiling and tracing infrastructure, and performance regression tests for AI workloads.
• Debug complex issues across user space, the Linux kernel, firmware, FPGA prototypes, and accelerator hardware.

Requirements

Must-have technical skills and experience:

• Strong knowledge of computer architecture, virtual memory, cache coherence, address translation, DMA, and interrupts.
• Proven experience developing OS-level code and device drivers in C/C++ for multiprocessor or heterogeneous systems.
• Experience with device drivers, memory management, DMA, interrupts, synchronization, virtualization, or IOMMUs.
• Experience debugging complex multicore or heterogeneous systems using tools such as GDB, JTAG, OpenOCD, perf, or ftrace.
• Familiarity with Git, GNU toolchain, Makefiles, and shell scripting.
• Experience collaborating with hardware architecture and engineering teams.
• Strong communication, collaboration, and listening skills.
• Right to work in Taiwan and ability to pass background and export-control checks.

Education Requirements

B.Sc. or M.Sc. in Computer Science, Computer Engineering, Electrical Engineering, or a related discipline; or equivalent practical experience.

About the Company

Company: SiFive

Headquarters: San Mateo, California, United States

SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.