Sr. Signal and Power Integrity Engineer, Satellites (Starlink)

Job Title

Sr. Signal and Power Integrity Engineer, Satellites (Starlink)

Role Summary

Responsible for signal integrity (SI) and power integrity (PI) ownership across the full hardware lifecycle for Starlink satellite payloads. Work spans IP/package/PCB evaluation, channel and PDN architecture, simulation and lab characterization, troubleshooting, qualification, and production support.

Collaborate with RF, antenna, ASIC, packaging, mechanical, thermal, software, supply chain, and production teams to define SI/PI requirements and verification workflows.

Experience Level

Senior — typically 5+ years of industry experience with significant SI/PI and high-speed digital design experience; specific tool experience (2+ years) with 3D EM and channel simulators is expected.

Responsibilities

Primary responsibilities include design, analysis, verification, and production support for SI and PI on satellite hardware.

• Specify, design, simulate, verify, qualify, and troubleshoot SI and PI for high-speed wireline, optoelectronic links (10–112+ Gbps SERDES), and high-bandwidth memory interfaces.
• Architect PDNs and define power delivery strategies for ASICs, FPGAs, SoCs, and memory.
• Derive PCB material and channel specifications, including stackup selection and transition structures.
• Drive component selection for PDN designs and optimize signal transitions from die-to-die and through-package/PCB paths.
• Lead lab characterization, qualification testing, and root-cause analysis for PCB manufacturing, PCBA test, and satellite integration issues.
• Define and maintain simulation workflows, signoff criteria, test methodologies, and lab equipment needs for SI/PI verification.
• Share SI/PI best practices and train cross-functional engineers across the Starlink program.

Requirements

Must-have technical skills, practical experience, and regulatory eligibility.

• 5+ years industry experience designing circuits, electronic products, or hardware.
• 2+ years experience using 3D electromagnetic or high-frequency EM tools and high-speed digital channel simulators (examples: CST, HFSS, ADS).
• 2+ years research or industry experience with high-speed digital design or power integrity.
• Experience with high-speed SERDES, DSP-based transceivers, retimers, or optoelectronics; and with high-bandwidth memory interfaces (DDR4, LPDDR5, GDDR/GPDDR, QSPI, eMMC).
• Experience designing, implementing, and debugging PDNs for complex processors, SoCs, FPGAs, or ASICs.
• Practical skills in PCB stackup, low-loss laminates, high-volume PCB manufacturing, and high-speed connectors.
• Ability to perform lab characterization, EMI/EMC debugging, and manufacturing root-cause analysis.
• Willingness to work extended hours or weekends for mission-critical deadlines; occasional travel as required.
• ITAR eligibility required: must be a U.S. citizen, U.S. national, lawful permanent resident, refugee, asylee, or otherwise eligible for required Department of State authorizations.

Education Requirements

Required: Bachelor’s degree in Electrical Engineering, Computer Engineering, or Physics. Preferred: Master’s degree or PhD in Electrical or Computer Engineering with emphasis in electromagnetic theory, transmission line theory, wireline transceivers, or power integrity.

Preferred Skills

Nice-to-have skills and deeper domain experience.

• 5+ years full life-cycle electronic product development from concept through production.
• 5+ years architecting and debugging high-speed DSP-based SERDES (e.g., 56Gbps, 112Gbps, 224Gbps) across package and PCB.
• 5+ years working with high-speed, high-bandwidth memory interfaces and complex PDNs.
• Thorough understanding of wireline transceiver concepts, architectures, and circuits.
• Proficiency with programming and scripting (Python, C/C++).
• Experience resolving EMI/EMC de-sense issues and working in cross-functional hardware teams.

Compensation & Additional Notes

Salary range (base): $140,000 - $190,000 per year. Actual pay depends on experience, education, and role level. Benefits include medical, vision, dental, 401(k), disability and life insurance, paid time off, and potential stock or long-term incentives.

SpaceX is an Equal Opportunity Employer. Applicants requesting accommodations or viewing the Affirmative Action Plan may contact EEOCompliance@spacex.com.

About the Company

Company: SpaceX

Headquarters: Hawthorne, California, United States

SpaceX is focused on developing space technologies to enable human exploration of Mars and beyond. The company is known for its advancements in rocketry and its Starlink satellite constellation, which delivers high-speed internet globally.