Sr. SI/PI Engineer - SerDes, Satellites (Starlink)

Job Title

Sr. SI/PI Engineer - SerDes, Satellites (Starlink)

Role Summary

Responsible for signal integrity (SI) and power integrity (PI) ownership for Starlink satellite payload hardware throughout the product lifecycle, from early silicon/package evaluation through production troubleshooting and qualification.

Work on cross-functional teams (ASIC, packaging, RF/antenna, mechanical, thermal, software, production) to specify, simulate, verify, and debug high-speed SERDES links, memory interfaces, and power delivery networks for satellite hardware.

Experience Level

Senior-level. Basic qualifications specify 5+ years of industry experience with at least 2+ years using 3D EM and high-speed channel simulation tools and 2+ years in high-speed digital design or power integrity.

Responsibilities

Provide SI/PI technical leadership across design, verification, test, and production for high-speed satellite electronics.

• Specify, design, simulate, verify, qualify, and troubleshoot SI and PI for high-speed SerDes, DSPs, retimers, optoelectronics, and memory interfaces.
• Architect PCB channel and PDN solutions and derive top-level specifications for PCB materials and channel subcomponents.
• Design and optimize transitions and interconnects across the full channel (die-to-die, package, PCB, connectors).
• Drive component selection to meet PDN and signal integrity targets.
• Oversee PCB layout decisions and provide guidance to layout and package teams.
• Lead lab characterization, root-cause analysis, and production troubleshooting of PCB manufacturing and PCBA test failures.
• Define simulation workflows, signoff criteria, test methodologies, and lab equipment requirements for SI/PI verification.
• Transfer SI/PI knowledge and best practices across the Starlink hardware organization.

Requirements

Key technical and personal requirements. Education details are summarized in the Education Requirements section below.

• Must-have: 5+ years industry experience designing circuits, electronic products, or hardware.
• Must-have: 2+ years using 3D EM simulation tools and high-speed digital channel simulators (examples: CST, HFSS, ADS).
• Must-have: 2+ years of research or industry experience with high-speed digital design or power integrity.
• Must-have: Practical experience with lab characterization, debugging, and production troubleshooting of PCBs and PCBA integration.
• Nice-to-have: Experience architecting and debugging advanced DSP-based SERDES (56–224 Gbps), high-speed memory interfaces (DDR4, LPDDR5, GDDR, QSPI, eMMC), and PDNs for large processors/FPGAs/ASICs.
• Nice-to-have: Strong understanding of wireline transceiver concepts and experience with low-loss laminates, high-volume PCB manufacturing, and high-speed connectors.
• Nice-to-have: Programming skills (Python, C/C++) and experience resolving EMI/EMC de-sense issues.
• Additional: Ability to work extended hours or weekends for mission-critical deadlines; occasional travel may be required.
• ITAR requirement: Applicant must be a U.S. citizen, U.S. lawful permanent resident (green card holder), Refugee under 8 U.S.C. § 1157, Asylee under 8 U.S.C. § 1158, or eligible to obtain required authorizations from the U.S. Department of State.

For questions about accommodations or SpaceX's affirmative action plan, the posting lists EEOCompliance@spacex.com.

Education Requirements

Required: Bachelor's degree in electrical engineering, computer engineering, or physics. Preferred: Master's degree or PhD in electrical engineering or computer engineering with emphasis in electromagnetic theory, transmission line theory, wireline transceivers, or power integrity.

About the Company

Company: SpaceX

Headquarters: Hawthorne, California, United States

SpaceX is focused on developing space technologies to enable human exploration of Mars and beyond. The company is known for its advancements in rocketry and its Starlink satellite constellation, which delivers high-speed internet globally.