Sr. RTL Design Engineer (Silicon Engineering)

Job Title

Sr. RTL Design Engineer (Silicon Engineering)

Role Summary

Design and deliver RTL for next‑generation ASICs used in Starlink space and ground systems. Work with systems, firmware, architecture, verification, and physical implementation teams to produce synthesis‑ and timing‑clean designs and support silicon bring‑up.

Role requires hands‑on RTL implementation, micro‑architecture definition, and cross‑team technical coordination to meet performance, power, and schedule targets.

Experience Level

Senior — minimum 5+ years of RTL implementation experience (as stated in basic qualifications).

Responsibilities

The core responsibilities include:

• Evaluate architectural tradeoffs against feature, performance, and system constraints.
• Define micro‑architecture and implement RTL in Verilog/SystemVerilog; integrate into top level.
• Deliver fully verified, synthesis/timing‑clean RTL and provide timing constraints for IP.
• Collaborate closely with verification teams to ensure coverage of design features.
• Support physical implementation teams (synthesis, timing closure, formality checks).
• Participate in silicon bring‑up and hardware validation activities.

Requirements

Must‑have skills and constraints; preferred items listed separately.

• 5+ years of hands‑on RTL implementation experience.
• Proficient in Verilog/SystemVerilog and RTL design methodology.
• Experience delivering synthesis‑ and timing‑clean designs and providing timing constraints.
• Ability to work with verification and physical implementation teams through tapeout and bring‑up.
• Willingness to work extended hours or weekends as required for mission‑critical deadlines.
• ITAR eligibility required: U.S. citizen, U.S. lawful permanent resident, refugee, asylee, or eligible for required U.S. Department of State authorizations. Learn more: https://www.pmddtc.state.gov.

Nice‑to‑have:

• ASIC/SoC integration experience and embedded CPU subsystem exposure.
• Experience with standard bus protocols (e.g. AXI, AHB) and high‑speed/low‑power techniques.
• Scripting (Python) and familiarity with EDA tools (HDL simulators, linting, formality).
• Strong debugging skills for clock domain crossings and power optimization.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science (as stated under basic qualifications).

About the Company

Company: SpaceX

Headquarters: Hawthorne, California, United States

SpaceX is focused on developing space technologies to enable human exploration of Mars and beyond. The company is known for its advancements in rocketry and its Starlink satellite constellation, which delivers high-speed internet globally.