Sr Principal Test Engineer

Job Title

Sr Principal Test Engineer

Role Summary

Senior Principal Test Engineer on the Core Test Technology team responsible for developing and delivering test solutions for advanced ASICs, network switches, servers and network processors. Work with Product, Hardware, Design, System and Firmware teams to design, develop, validate and release production test programs and tester hardware.

Experience Level

Senior-level. The posting requests substantial experience (examples given: Bachelor's +15–20 years or Master's +10–15 years). Specific test-program development experience of 10+ years on ATE platforms is required.

Responsibilities

Contribute technical leadership across test program development, hardware, and test flow optimization.

• Develop characterization, production, and wafer-sort test programs for Advantest 93K and Teradyne ATE platforms.
• Design and validate tester hardware for high-speed testing.
• Create detailed test plans, test methodologies and related documentation to meet product specifications.
• Perform testability reviews with DFT/DFM teams and implement yield and test methodology improvements.
• Convert design simulation patterns to ATE formats and debug test patterns on hardware.
• Lead efforts to optimize test flow, reduce test time, remove/insert tests appropriately, and improve yield.
• Release and support production test programs; collaborate closely with product and engineering teams during bring-up and debug.
• Manage multiple priorities in a fast-paced environment and mentor junior engineers as needed.

Requirements

Must-have technical skills, tools and experience.

• 10+ years of test program development experience on Advantest 93K or Teradyne (Uflex/UflexPlus) ATE platforms.
• Demonstrable ATE testing experience, strong test methodology, and familiarity with silicon process, DFT/DFM and high-speed digital testing.
• Proficiency in programming/scripting: C/C++, Java, Perl, Python and working in Linux environments.
• Experience with tester hardware design and high-speed test signal considerations.
• Proven problem-solving skills, strong communication, teamwork and interpersonal skills.
• Track record of test flow optimization, test time reduction, yield improvement, and production release.
• Ability to lead cross-functional technical reviews and produce clear technical documentation.
• Must be eligible to access export-controlled technology; candidates may be subject to export license review.

Education Requirements

Posting specifies a Bachelor’s degree in Computer Science, Electrical Engineering or related field with 15–20 years of related experience, or a Master’s degree in those fields with 10–15 years of related experience. The posting also requires significant hands-on test-program development experience (10+ years). Equivalent practical experience is not explicitly stated but may be considered case-by-case.

Expected base pay range (USD): $162,000 - $239,760 per annum. This role is eligible for bonus and equity participation.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.